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drm/i915/hdcp: update current transcoder into intel_hdcp
On gen12+ platforms, HDCP HW is associated to the transcoder. Hence on every modeset update associated transcoder into the intel_hdcp of the port. v2: s/trans/cpu_transcoder [Jani] v3: comment is added for fw_ddi init for gen12+ [Shashank] only hdcp capable transcoder is translated into fw_tc [Shashank] v4: fw_tc initialization is kept for modeset. [Tomas] few extra doc is added at port_data init [Tomas] v5: Few comments are improvised [Tomas] Signed-off-by: Ramalingam C <ramalingam.c@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190828164216.405-6-ramalingam.c@intel.com
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2d15cf1b9a
commit
39e2df090c
5 changed files with 62 additions and 1 deletions
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@ -388,6 +388,13 @@ struct intel_hdcp {
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wait_queue_head_t cp_irq_queue;
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atomic_t cp_irq_count;
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int cp_irq_count_cached;
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/*
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* HDCP register access for gen12+ need the transcoder associated.
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* Transcoder attached to the connector could be changed at modeset.
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* Hence caching the transcoder here.
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*/
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enum transcoder cpu_transcoder;
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};
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struct intel_connector {
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@ -2261,6 +2261,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
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intel_psr_compute_config(intel_dp, pipe_config);
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intel_hdcp_transcoder_config(intel_connector,
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pipe_config->cpu_transcoder);
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return 0;
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}
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@ -1764,13 +1764,58 @@ enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
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}
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}
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static inline
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enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
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{
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switch (cpu_transcoder) {
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case TRANSCODER_A ... TRANSCODER_D:
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return (enum mei_fw_tc)(cpu_transcoder | 0x10);
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default: /* eDP, DSI TRANSCODERS are non HDCP capable */
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return MEI_INVALID_TRANSCODER;
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}
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}
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void intel_hdcp_transcoder_config(struct intel_connector *connector,
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enum transcoder cpu_transcoder)
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{
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struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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struct intel_hdcp *hdcp = &connector->hdcp;
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if (!hdcp->shim)
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return;
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if (INTEL_GEN(dev_priv) >= 12) {
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mutex_lock(&hdcp->mutex);
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hdcp->cpu_transcoder = cpu_transcoder;
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hdcp->port_data.fw_tc = intel_get_mei_fw_tc(cpu_transcoder);
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mutex_unlock(&hdcp->mutex);
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}
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}
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static inline int initialize_hdcp_port_data(struct intel_connector *connector,
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const struct intel_hdcp_shim *shim)
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{
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struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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struct intel_hdcp *hdcp = &connector->hdcp;
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struct hdcp_port_data *data = &hdcp->port_data;
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data->fw_ddi = intel_get_mei_fw_ddi_index(connector->encoder->port);
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if (INTEL_GEN(dev_priv) < 12)
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data->fw_ddi =
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intel_get_mei_fw_ddi_index(connector->encoder->port);
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else
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/*
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* As per ME FW API expectation, for GEN 12+, fw_ddi is filled
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* with zero(INVALID PORT index).
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*/
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data->fw_ddi = MEI_DDI_INVALID_PORT;
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/*
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* As associated transcoder is set and modified at modeset, here fw_tc
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* is initialized to zero (invalid transcoder index). This will be
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* retained for <Gen12 forever.
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*/
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data->fw_tc = MEI_INVALID_TRANSCODER;
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data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
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data->protocol = (u8)shim->protocol;
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@ -16,10 +16,13 @@ struct drm_i915_private;
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struct intel_connector;
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struct intel_hdcp_shim;
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enum port;
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enum transcoder;
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void intel_hdcp_atomic_check(struct drm_connector *connector,
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struct drm_connector_state *old_state,
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struct drm_connector_state *new_state);
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void intel_hdcp_transcoder_config(struct intel_connector *connector,
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enum transcoder cpu_transcoder);
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int intel_hdcp_init(struct intel_connector *connector,
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const struct intel_hdcp_shim *hdcp_shim);
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int intel_hdcp_enable(struct intel_connector *connector, u8 content_type);
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@ -2431,6 +2431,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
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return -EINVAL;
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}
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intel_hdcp_transcoder_config(intel_hdmi->attached_connector,
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pipe_config->cpu_transcoder);
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return 0;
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}
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