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clk: renesas: Updates for v4.11
- Add CAN and MSIOF related clocks for R-Car M3-W. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYeNTsAAoJEEgEtLw/Ve77UMAP/R5ZKHbcI443vlkzkVFQY6h+ 2cYRJPiqRQKCqMYDuLiV+n0aXitrsd8tV1I/vNgvvJhKqabzGtk+rTnLkmtqcnXQ oyiIzMxwbBbFeYrvCbhI/CZNbk5/pPAmvzUOLMnX8uxwbKaTF1QbWdu+moS8OtXx xFF/En3VC5yOfTqmSMH+dQ+GEdMRqMS53QbIaRxCezxTQ01CqtGDOqu9CmiMeF1O QZn2iYobh2bWA0eBXz8zF/VMJ5euxcqOoCa/xlC82p+BV3E6I4WKVwHz+nJHEsLk 8Fz+jkpuatT1mT9mQ0bra4h+mHLkThy72pcp94NCGmsZGgN3qwcnU5QDE3qD9c2T 9110rDmvMb0gstX7wFFNipa2qnMN7FPBaJOhV30QJ1kDwqM7h1CBo6NZVf/UCppP Wvnv4qz6H6rBvWm/4J1VBflZyYavSfivxNHsZZPGIX/MkxKNVZ5PMhdVC7+kaukF 5EvbBXGX0CCk4hd5ZcLP9XzzG5O0sfImn6LnRQf8xtJAxRWQZ4YxHduIOSlp2NdH lzirS5Z2PU2enhOm/IEEtYCT8l8bQ1HN1PdOMfmDKGJTg+P+JbTW0NLr6MqWtS8a ATatzNZQ9ZYPToKzsJ+k5ZExqMRFYLkepSfH4bRAiD8YVscHSQzOH/8IZLD78G3O TYHSxujV45Pm6hzweMt8 =66mZ -----END PGP SIGNATURE----- Merge tag 'clk-renesas-for-v4.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next Pull renesas clk updates from Geert Uytterhoeven: - Add CAN and MSIOF related clocks for R-Car M3-W. * tag 'clk-renesas-for-v4.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: r8a7796: Add MSIOF controller clocks clk: renesas: r8a7796: Add CAN FD peripheral clock clk: renesas: r8a7796: Add CANFD clock clk: renesas: r8a7796: Add CAN peripheral clock
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3a1ba8ba67
1 changed files with 9 additions and 0 deletions
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@ -103,7 +103,9 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
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DEF_FIXED("cl", R8A7796_CLK_CL, CLK_PLL1_DIV2, 48, 1),
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DEF_FIXED("cp", R8A7796_CLK_CP, CLK_EXTAL, 2, 1),
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DEF_DIV6P1("canfd", R8A7796_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
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DEF_DIV6P1("csi0", R8A7796_CLK_CSI0, CLK_PLL1_DIV4, 0x00c),
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DEF_DIV6P1("mso", R8A7796_CLK_MSO, CLK_PLL1_DIV4, 0x014),
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DEF_DIV6_RO("osc", R8A7796_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
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DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
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@ -117,6 +119,10 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
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DEF_MOD("scif3", 204, R8A7796_CLK_S3D4),
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DEF_MOD("scif1", 206, R8A7796_CLK_S3D4),
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DEF_MOD("scif0", 207, R8A7796_CLK_S3D4),
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DEF_MOD("msiof3", 208, R8A7796_CLK_MSO),
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DEF_MOD("msiof2", 209, R8A7796_CLK_MSO),
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DEF_MOD("msiof1", 210, R8A7796_CLK_MSO),
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DEF_MOD("msiof0", 211, R8A7796_CLK_MSO),
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DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S0D3),
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DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S0D3),
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DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S0D3),
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@ -181,6 +187,9 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
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DEF_MOD("gpio2", 910, R8A7796_CLK_S3D4),
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DEF_MOD("gpio1", 911, R8A7796_CLK_S3D4),
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DEF_MOD("gpio0", 912, R8A7796_CLK_S3D4),
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DEF_MOD("can-fd", 914, R8A7796_CLK_S3D2),
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DEF_MOD("can-if1", 915, R8A7796_CLK_S3D4),
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DEF_MOD("can-if0", 916, R8A7796_CLK_S3D4),
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DEF_MOD("i2c6", 918, R8A7796_CLK_S0D6),
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DEF_MOD("i2c5", 919, R8A7796_CLK_S0D6),
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DEF_MOD("i2c4", 927, R8A7796_CLK_S0D6),
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