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usb: chipidea: use hrtimer for otg fsm timers
Current otg fsm timers are using controller 1ms irq and count it, this patch is to replace it with hrtimer solution, use one hrtimer for all otg timers. Signed-off-by: Li Jun <jun.li@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
2f8a467a11
commit
3a316ec4c9
3 changed files with 193 additions and 200 deletions
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@ -162,7 +162,10 @@ struct hw_bank {
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* @role: current role
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* @role: current role
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* @is_otg: if the device is otg-capable
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* @is_otg: if the device is otg-capable
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* @fsm: otg finite state machine
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* @fsm: otg finite state machine
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* @fsm_timer: pointer to timer list of otg fsm
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* @otg_fsm_hrtimer: hrtimer for otg fsm timers
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* @hr_timeouts: time out list for active otg fsm timers
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* @enabled_otg_timer_bits: bits of enabled otg timers
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* @next_otg_timer: next nearest enabled timer to be expired
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* @work: work for role changing
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* @work: work for role changing
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* @wq: workqueue thread
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* @wq: workqueue thread
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* @qh_pool: allocation pool for queue heads
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* @qh_pool: allocation pool for queue heads
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@ -205,7 +208,10 @@ struct ci_hdrc {
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bool is_otg;
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bool is_otg;
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struct usb_otg otg;
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struct usb_otg otg;
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struct otg_fsm fsm;
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struct otg_fsm fsm;
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struct ci_otg_fsm_timer_list *fsm_timer;
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struct hrtimer otg_fsm_hrtimer;
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ktime_t hr_timeouts[NUM_OTG_FSM_TIMERS];
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unsigned enabled_otg_timer_bits;
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enum otg_fsm_timer next_otg_timer;
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struct work_struct work;
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struct work_struct work;
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struct workqueue_struct *wq;
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struct workqueue_struct *wq;
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@ -30,22 +30,6 @@
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#include "otg.h"
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#include "otg.h"
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#include "otg_fsm.h"
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#include "otg_fsm.h"
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static struct ci_otg_fsm_timer *otg_timer_initializer
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(struct ci_hdrc *ci, void (*function)(void *, unsigned long),
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unsigned long expires, unsigned long data)
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{
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struct ci_otg_fsm_timer *timer;
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timer = devm_kzalloc(ci->dev, sizeof(struct ci_otg_fsm_timer),
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GFP_KERNEL);
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if (!timer)
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return NULL;
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timer->function = function;
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timer->expires = expires;
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timer->data = data;
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return timer;
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}
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/* Add for otg: interact with user space app */
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/* Add for otg: interact with user space app */
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static ssize_t
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static ssize_t
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get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
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get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
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@ -203,37 +187,49 @@ static struct attribute_group inputs_attr_group = {
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.attrs = inputs_attrs,
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.attrs = inputs_attrs,
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};
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};
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/*
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* Keep this list in the same order as timers indexed
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* by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
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*/
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static unsigned otg_timer_ms[] = {
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TA_WAIT_VRISE,
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TA_WAIT_VFALL,
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TA_WAIT_BCON,
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TA_AIDL_BDIS,
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TB_ASE0_BRST,
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TA_BIDL_ADIS,
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TB_SE0_SRP,
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TB_SRP_FAIL,
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0,
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TB_DATA_PLS,
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TB_SSEND_SRP,
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};
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/*
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/*
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* Add timer to active timer list
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* Add timer to active timer list
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*/
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*/
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static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
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static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
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{
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{
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struct ci_otg_fsm_timer *tmp_timer;
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unsigned long flags, timer_sec, timer_nsec;
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struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
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struct list_head *active_timers = &ci->fsm_timer->active_timers;
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if (t >= NUM_OTG_FSM_TIMERS)
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if (t >= NUM_OTG_FSM_TIMERS)
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return;
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return;
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/*
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spin_lock_irqsave(&ci->lock, flags);
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* Check if the timer is already in the active list,
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timer_sec = otg_timer_ms[t] / MSEC_PER_SEC;
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* if so update timer count
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timer_nsec = (otg_timer_ms[t] % MSEC_PER_SEC) * NSEC_PER_MSEC;
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*/
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ci->hr_timeouts[t] = ktime_add(ktime_get(),
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list_for_each_entry(tmp_timer, active_timers, list)
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ktime_set(timer_sec, timer_nsec));
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if (tmp_timer == timer) {
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ci->enabled_otg_timer_bits |= (1 << t);
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timer->count = timer->expires;
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if ((ci->next_otg_timer == NUM_OTG_FSM_TIMERS) ||
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return;
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(ci->hr_timeouts[ci->next_otg_timer].tv64 >
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}
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ci->hr_timeouts[t].tv64)) {
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ci->next_otg_timer = t;
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if (list_empty(active_timers))
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hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
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pm_runtime_get(ci->dev);
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ci->hr_timeouts[t], NSEC_PER_MSEC,
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HRTIMER_MODE_ABS);
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timer->count = timer->expires;
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}
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list_add_tail(&timer->list, active_timers);
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spin_unlock_irqrestore(&ci->lock, flags);
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/* Enable 1ms irq */
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if (!(hw_read_otgsc(ci, OTGSC_1MSIE)))
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hw_write_otgsc(ci, OTGSC_1MSIE, OTGSC_1MSIE);
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}
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}
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/*
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/*
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@ -241,174 +237,178 @@ static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
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*/
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*/
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static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
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static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t)
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{
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{
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struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
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unsigned long flags, enabled_timer_bits;
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struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
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enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
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struct list_head *active_timers = &ci->fsm_timer->active_timers;
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int flag = 0;
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if (t >= NUM_OTG_FSM_TIMERS)
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if ((t >= NUM_OTG_FSM_TIMERS) ||
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!(ci->enabled_otg_timer_bits & (1 << t)))
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return;
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return;
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list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list)
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spin_lock_irqsave(&ci->lock, flags);
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if (tmp_timer == timer) {
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ci->enabled_otg_timer_bits &= ~(1 << t);
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list_del(&timer->list);
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if (ci->next_otg_timer == t) {
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flag = 1;
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if (ci->enabled_otg_timer_bits == 0) {
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}
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/* No enabled timers after delete it */
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hrtimer_cancel(&ci->otg_fsm_hrtimer);
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/* Disable 1ms irq if there is no any active timer */
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ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
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if (list_empty(active_timers) && (flag == 1)) {
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} else {
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hw_write_otgsc(ci, OTGSC_1MSIE, 0);
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/* Find the next timer */
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pm_runtime_put(ci->dev);
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enabled_timer_bits = ci->enabled_otg_timer_bits;
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}
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for_each_set_bit(cur_timer, &enabled_timer_bits,
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}
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NUM_OTG_FSM_TIMERS) {
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if ((next_timer == NUM_OTG_FSM_TIMERS) ||
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/*
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(ci->hr_timeouts[next_timer].tv64 <
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* Reduce timer count by 1, and find timeout conditions.
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ci->hr_timeouts[cur_timer].tv64))
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* Called by otg 1ms timer interrupt
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next_timer = cur_timer;
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*/
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}
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static inline int ci_otg_tick_timer(struct ci_hdrc *ci)
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{
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struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
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struct list_head *active_timers = &ci->fsm_timer->active_timers;
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int expired = 0;
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list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list) {
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tmp_timer->count--;
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/* check if timer expires */
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if (!tmp_timer->count) {
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list_del(&tmp_timer->list);
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tmp_timer->function(ci, tmp_timer->data);
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expired = 1;
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}
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}
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}
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}
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if (next_timer != NUM_OTG_FSM_TIMERS) {
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/* disable 1ms irq if there is no any timer active */
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ci->next_otg_timer = next_timer;
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if ((expired == 1) && list_empty(active_timers)) {
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hrtimer_start_range_ns(&ci->otg_fsm_hrtimer,
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hw_write_otgsc(ci, OTGSC_1MSIE, 0);
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ci->hr_timeouts[next_timer], NSEC_PER_MSEC,
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pm_runtime_put(ci->dev);
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HRTIMER_MODE_ABS);
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}
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}
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spin_unlock_irqrestore(&ci->lock, flags);
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return expired;
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}
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}
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/* The timeout callback function to set time out bit */
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/* OTG FSM timer handlers */
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static void set_tmout(void *ptr, unsigned long indicator)
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static int a_wait_vrise_tmout(struct ci_hdrc *ci)
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{
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{
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*(int *)indicator = 1;
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ci->fsm.a_wait_vrise_tmout = 1;
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return 0;
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}
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}
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static void set_tmout_and_fsm(void *ptr, unsigned long indicator)
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static int a_wait_vfall_tmout(struct ci_hdrc *ci)
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{
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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ci->fsm.a_wait_vfall_tmout = 1;
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return 0;
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set_tmout(ci, indicator);
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ci_otg_queue_work(ci);
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}
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}
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static void a_wait_vfall_tmout_func(void *ptr, unsigned long indicator)
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static int a_wait_bcon_tmout(struct ci_hdrc *ci)
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{
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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ci->fsm.a_wait_bcon_tmout = 1;
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return 0;
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set_tmout(ci, indicator);
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/* Disable port power */
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hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 0);
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/* Clear existing DP irq */
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hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
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/* Enable data pulse irq */
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hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
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ci_otg_queue_work(ci);
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}
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}
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static void b_ssend_srp_tmout_func(void *ptr, unsigned long indicator)
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static int a_aidl_bdis_tmout(struct ci_hdrc *ci)
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{
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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ci->fsm.a_aidl_bdis_tmout = 1;
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return 0;
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set_tmout(ci, indicator);
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/* only vbus fall below B_sess_vld in b_idle state */
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if (ci->fsm.otg->state == OTG_STATE_B_IDLE)
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ci_otg_queue_work(ci);
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}
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}
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static void b_data_pulse_end(void *ptr, unsigned long indicator)
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static int b_ase0_brst_tmout(struct ci_hdrc *ci)
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{
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{
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struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
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ci->fsm.b_ase0_brst_tmout = 1;
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return 0;
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}
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static int a_bidl_adis_tmout(struct ci_hdrc *ci)
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{
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ci->fsm.a_bidl_adis_tmout = 1;
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return 0;
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}
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static int b_se0_srp_tmout(struct ci_hdrc *ci)
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{
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ci->fsm.b_se0_srp = 1;
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return 0;
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}
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static int b_srp_fail_tmout(struct ci_hdrc *ci)
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{
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ci->fsm.b_srp_done = 1;
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return 1;
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}
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static int b_data_pls_tmout(struct ci_hdrc *ci)
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{
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ci->fsm.b_srp_done = 1;
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ci->fsm.b_srp_done = 1;
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ci->fsm.b_bus_req = 0;
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ci->fsm.b_bus_req = 0;
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if (ci->fsm.power_up)
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if (ci->fsm.power_up)
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ci->fsm.power_up = 0;
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ci->fsm.power_up = 0;
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hw_write_otgsc(ci, OTGSC_HABA, 0);
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hw_write_otgsc(ci, OTGSC_HABA, 0);
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pm_runtime_put(ci->dev);
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return 0;
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}
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ci_otg_queue_work(ci);
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static int b_ssend_srp_tmout(struct ci_hdrc *ci)
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{
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ci->fsm.b_ssend_srp = 1;
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/* only vbus fall below B_sess_vld in b_idle state */
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if (ci->fsm.otg->state == OTG_STATE_B_IDLE)
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return 0;
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else
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return 1;
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}
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/*
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* Keep this list in the same order as timers indexed
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* by enum otg_fsm_timer in include/linux/usb/otg-fsm.h
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*/
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static int (*otg_timer_handlers[])(struct ci_hdrc *) = {
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a_wait_vrise_tmout, /* A_WAIT_VRISE */
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a_wait_vfall_tmout, /* A_WAIT_VFALL */
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a_wait_bcon_tmout, /* A_WAIT_BCON */
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a_aidl_bdis_tmout, /* A_AIDL_BDIS */
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b_ase0_brst_tmout, /* B_ASE0_BRST */
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a_bidl_adis_tmout, /* A_BIDL_ADIS */
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b_se0_srp_tmout, /* B_SE0_SRP */
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b_srp_fail_tmout, /* B_SRP_FAIL */
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NULL, /* A_WAIT_ENUM */
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b_data_pls_tmout, /* B_DATA_PLS */
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b_ssend_srp_tmout, /* B_SSEND_SRP */
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};
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/*
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* Enable the next nearest enabled timer if have
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*/
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static enum hrtimer_restart ci_otg_hrtimer_func(struct hrtimer *t)
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{
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struct ci_hdrc *ci = container_of(t, struct ci_hdrc, otg_fsm_hrtimer);
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ktime_t now, *timeout;
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unsigned long enabled_timer_bits;
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unsigned long flags;
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enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS;
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int ret = -EINVAL;
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spin_lock_irqsave(&ci->lock, flags);
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enabled_timer_bits = ci->enabled_otg_timer_bits;
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ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
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now = ktime_get();
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for_each_set_bit(cur_timer, &enabled_timer_bits, NUM_OTG_FSM_TIMERS) {
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if (now.tv64 >= ci->hr_timeouts[cur_timer].tv64) {
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ci->enabled_otg_timer_bits &= ~(1 << cur_timer);
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if (otg_timer_handlers[cur_timer])
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ret = otg_timer_handlers[cur_timer](ci);
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} else {
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if ((next_timer == NUM_OTG_FSM_TIMERS) ||
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(ci->hr_timeouts[cur_timer].tv64 <
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ci->hr_timeouts[next_timer].tv64))
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next_timer = cur_timer;
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}
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}
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/* Enable the next nearest timer */
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if (next_timer < NUM_OTG_FSM_TIMERS) {
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timeout = &ci->hr_timeouts[next_timer];
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||||||
|
hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, *timeout,
|
||||||
|
NSEC_PER_MSEC, HRTIMER_MODE_ABS);
|
||||||
|
ci->next_otg_timer = next_timer;
|
||||||
|
}
|
||||||
|
spin_unlock_irqrestore(&ci->lock, flags);
|
||||||
|
|
||||||
|
if (!ret)
|
||||||
|
ci_otg_queue_work(ci);
|
||||||
|
|
||||||
|
return HRTIMER_NORESTART;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Initialize timers */
|
/* Initialize timers */
|
||||||
static int ci_otg_init_timers(struct ci_hdrc *ci)
|
static int ci_otg_init_timers(struct ci_hdrc *ci)
|
||||||
{
|
{
|
||||||
struct otg_fsm *fsm = &ci->fsm;
|
hrtimer_init(&ci->otg_fsm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
|
||||||
|
ci->otg_fsm_hrtimer.function = ci_otg_hrtimer_func;
|
||||||
/* FSM used timers */
|
|
||||||
ci->fsm_timer->timer_list[A_WAIT_VRISE] =
|
|
||||||
otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_VRISE,
|
|
||||||
(unsigned long)&fsm->a_wait_vrise_tmout);
|
|
||||||
if (ci->fsm_timer->timer_list[A_WAIT_VRISE] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
ci->fsm_timer->timer_list[A_WAIT_VFALL] =
|
|
||||||
otg_timer_initializer(ci, &a_wait_vfall_tmout_func,
|
|
||||||
TA_WAIT_VFALL, (unsigned long)&fsm->a_wait_vfall_tmout);
|
|
||||||
if (ci->fsm_timer->timer_list[A_WAIT_VFALL] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
ci->fsm_timer->timer_list[A_WAIT_BCON] =
|
|
||||||
otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_BCON,
|
|
||||||
(unsigned long)&fsm->a_wait_bcon_tmout);
|
|
||||||
if (ci->fsm_timer->timer_list[A_WAIT_BCON] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
ci->fsm_timer->timer_list[A_AIDL_BDIS] =
|
|
||||||
otg_timer_initializer(ci, &set_tmout_and_fsm, TA_AIDL_BDIS,
|
|
||||||
(unsigned long)&fsm->a_aidl_bdis_tmout);
|
|
||||||
if (ci->fsm_timer->timer_list[A_AIDL_BDIS] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
ci->fsm_timer->timer_list[A_BIDL_ADIS] =
|
|
||||||
otg_timer_initializer(ci, &set_tmout_and_fsm, TA_BIDL_ADIS,
|
|
||||||
(unsigned long)&fsm->a_bidl_adis_tmout);
|
|
||||||
if (ci->fsm_timer->timer_list[A_BIDL_ADIS] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
ci->fsm_timer->timer_list[B_ASE0_BRST] =
|
|
||||||
otg_timer_initializer(ci, &set_tmout_and_fsm, TB_ASE0_BRST,
|
|
||||||
(unsigned long)&fsm->b_ase0_brst_tmout);
|
|
||||||
if (ci->fsm_timer->timer_list[B_ASE0_BRST] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
ci->fsm_timer->timer_list[B_SE0_SRP] =
|
|
||||||
otg_timer_initializer(ci, &set_tmout_and_fsm, TB_SE0_SRP,
|
|
||||||
(unsigned long)&fsm->b_se0_srp);
|
|
||||||
if (ci->fsm_timer->timer_list[B_SE0_SRP] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
ci->fsm_timer->timer_list[B_SSEND_SRP] =
|
|
||||||
otg_timer_initializer(ci, &b_ssend_srp_tmout_func, TB_SSEND_SRP,
|
|
||||||
(unsigned long)&fsm->b_ssend_srp);
|
|
||||||
if (ci->fsm_timer->timer_list[B_SSEND_SRP] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
ci->fsm_timer->timer_list[B_SRP_FAIL] =
|
|
||||||
otg_timer_initializer(ci, &set_tmout, TB_SRP_FAIL,
|
|
||||||
(unsigned long)&fsm->b_srp_done);
|
|
||||||
if (ci->fsm_timer->timer_list[B_SRP_FAIL] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
ci->fsm_timer->timer_list[B_DATA_PLS] =
|
|
||||||
otg_timer_initializer(ci, &b_data_pulse_end, TB_DATA_PLS, 0);
|
|
||||||
if (ci->fsm_timer->timer_list[B_DATA_PLS] == NULL)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -512,6 +512,7 @@ static void ci_otg_start_pulse(struct otg_fsm *fsm)
|
||||||
/* Hardware Assistant Data pulse */
|
/* Hardware Assistant Data pulse */
|
||||||
hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
|
hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
|
||||||
|
|
||||||
|
pm_runtime_get(ci->dev);
|
||||||
ci_otg_add_timer(ci, B_DATA_PLS);
|
ci_otg_add_timer(ci, B_DATA_PLS);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -579,8 +580,15 @@ int ci_otg_fsm_work(struct ci_hdrc *ci)
|
||||||
* a_idle to a_wait_vrise when power up
|
* a_idle to a_wait_vrise when power up
|
||||||
*/
|
*/
|
||||||
if ((ci->fsm.id) || (ci->id_event) ||
|
if ((ci->fsm.id) || (ci->id_event) ||
|
||||||
(ci->fsm.power_up))
|
(ci->fsm.power_up)) {
|
||||||
ci_otg_queue_work(ci);
|
ci_otg_queue_work(ci);
|
||||||
|
} else {
|
||||||
|
/* Enable data pulse irq */
|
||||||
|
hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS |
|
||||||
|
PORTSC_PP, 0);
|
||||||
|
hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
|
||||||
|
hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
|
||||||
|
}
|
||||||
if (ci->id_event)
|
if (ci->id_event)
|
||||||
ci->id_event = false;
|
ci->id_event = false;
|
||||||
} else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) {
|
} else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) {
|
||||||
|
@ -712,11 +720,7 @@ irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci)
|
||||||
fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
|
fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
|
||||||
|
|
||||||
if (otg_int_src) {
|
if (otg_int_src) {
|
||||||
if (otg_int_src & OTGSC_1MSIS) {
|
if (otg_int_src & OTGSC_DPIS) {
|
||||||
hw_write_otgsc(ci, OTGSC_1MSIS, OTGSC_1MSIS);
|
|
||||||
retval = ci_otg_tick_timer(ci);
|
|
||||||
return IRQ_HANDLED;
|
|
||||||
} else if (otg_int_src & OTGSC_DPIS) {
|
|
||||||
hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
|
hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
|
||||||
fsm->a_srp_det = 1;
|
fsm->a_srp_det = 1;
|
||||||
fsm->a_bus_drop = 0;
|
fsm->a_bus_drop = 0;
|
||||||
|
@ -780,17 +784,13 @@ int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
|
||||||
|
|
||||||
mutex_init(&ci->fsm.lock);
|
mutex_init(&ci->fsm.lock);
|
||||||
|
|
||||||
ci->fsm_timer = devm_kzalloc(ci->dev,
|
|
||||||
sizeof(struct ci_otg_fsm_timer_list), GFP_KERNEL);
|
|
||||||
if (!ci->fsm_timer)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
INIT_LIST_HEAD(&ci->fsm_timer->active_timers);
|
|
||||||
retval = ci_otg_init_timers(ci);
|
retval = ci_otg_init_timers(ci);
|
||||||
if (retval) {
|
if (retval) {
|
||||||
dev_err(ci->dev, "Couldn't init OTG timers\n");
|
dev_err(ci->dev, "Couldn't init OTG timers\n");
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
ci->enabled_otg_timer_bits = 0;
|
||||||
|
ci->next_otg_timer = NUM_OTG_FSM_TIMERS;
|
||||||
|
|
||||||
retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group);
|
retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group);
|
||||||
if (retval < 0) {
|
if (retval < 0) {
|
||||||
|
|
|
@ -62,19 +62,6 @@
|
||||||
/* SSEND time before SRP */
|
/* SSEND time before SRP */
|
||||||
#define TB_SSEND_SRP (1500) /* minimum 1.5 sec, section:5.1.2 */
|
#define TB_SSEND_SRP (1500) /* minimum 1.5 sec, section:5.1.2 */
|
||||||
|
|
||||||
struct ci_otg_fsm_timer {
|
|
||||||
unsigned long expires; /* Number of count increase to timeout */
|
|
||||||
unsigned long count; /* Tick counter */
|
|
||||||
void (*function)(void *, unsigned long); /* Timeout function */
|
|
||||||
unsigned long data; /* Data passed to function */
|
|
||||||
struct list_head list;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct ci_otg_fsm_timer_list {
|
|
||||||
struct ci_otg_fsm_timer *timer_list[NUM_OTG_FSM_TIMERS];
|
|
||||||
struct list_head active_timers;
|
|
||||||
};
|
|
||||||
|
|
||||||
#ifdef CONFIG_USB_OTG_FSM
|
#ifdef CONFIG_USB_OTG_FSM
|
||||||
|
|
||||||
int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci);
|
int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci);
|
||||||
|
|
Loading…
Reference in a new issue