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spi/imx: save the spi chip select in config struct, not the gpio to use
This prepares adding support for imx51's eCSPI. This IP has seperate control and config bits for all four supported chip selects, so the config routine needs to know which chip select is being used even if the chipselect is realized by a gpio. Acked-by: Jason Wang <jason77.wang@gmail.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
1723e66b03
commit
3b2aa89eb3
1 changed files with 11 additions and 9 deletions
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@ -56,7 +56,7 @@ struct spi_imx_config {
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unsigned int speed_hz;
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unsigned int bpw;
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unsigned int mode;
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int cs;
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u8 cs;
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};
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enum spi_imx_devtype {
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@ -218,6 +218,7 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx,
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struct spi_imx_config *config)
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{
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unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
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int cs = spi_imx->chipselect[config->cs];
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
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MX31_CSPICTRL_DR_SHIFT;
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@ -230,9 +231,8 @@ static int __maybe_unused spi_imx0_4_config(struct spi_imx_data *spi_imx,
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reg |= MX31_CSPICTRL_POL;
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if (config->mode & SPI_CS_HIGH)
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reg |= MX31_CSPICTRL_SSPOL;
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if (config->cs < 0) {
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reg |= (config->cs + 32) << MX31_CSPICTRL_CS_SHIFT;
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}
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if (cs < 0)
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reg |= (cs + 32) << MX31_CSPICTRL_CS_SHIFT;
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writel(reg, spi_imx->base + MXC_CSPICTRL);
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@ -243,6 +243,7 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx,
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struct spi_imx_config *config)
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{
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unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
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int cs = spi_imx->chipselect[config->cs];
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reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
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MX31_CSPICTRL_DR_SHIFT;
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@ -256,8 +257,8 @@ static int __maybe_unused spi_imx0_7_config(struct spi_imx_data *spi_imx,
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reg |= MX31_CSPICTRL_POL;
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if (config->mode & SPI_CS_HIGH)
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reg |= MX31_CSPICTRL_SSPOL;
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if (config->cs < 0)
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reg |= (config->cs + 32) << MX35_CSPICTRL_CS_SHIFT;
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if (cs < 0)
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reg |= (cs + 32) << MX35_CSPICTRL_CS_SHIFT;
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writel(reg, spi_imx->base + MXC_CSPICTRL);
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@ -314,6 +315,7 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx,
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struct spi_imx_config *config)
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{
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unsigned int reg = MX27_CSPICTRL_ENABLE | MX27_CSPICTRL_MASTER;
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int cs = spi_imx->chipselect[config->cs];
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reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz) <<
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MX27_CSPICTRL_DR_SHIFT;
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@ -325,8 +327,8 @@ static int __maybe_unused mx27_config(struct spi_imx_data *spi_imx,
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reg |= MX27_CSPICTRL_POL;
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if (config->mode & SPI_CS_HIGH)
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reg |= MX27_CSPICTRL_SSPOL;
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if (config->cs < 0)
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reg |= (config->cs + 32) << MX27_CSPICTRL_CS_SHIFT;
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if (cs < 0)
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reg |= (cs + 32) << MX27_CSPICTRL_CS_SHIFT;
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writel(reg, spi_imx->base + MXC_CSPICTRL);
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@ -510,7 +512,7 @@ static int spi_imx_setupxfer(struct spi_device *spi,
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config.bpw = t ? t->bits_per_word : spi->bits_per_word;
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config.speed_hz = t ? t->speed_hz : spi->max_speed_hz;
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config.mode = spi->mode;
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config.cs = spi_imx->chipselect[spi->chip_select];
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config.cs = spi->chip_select;
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if (!config.speed_hz)
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config.speed_hz = spi->max_speed_hz;
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