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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 05:48:40 +00:00
ath9k: port to cfg80211 rfkill
This ports the ath9k rfkill code to the new API offered by cfg80211 and thus removes a lot of useless stuff. ("With this series a kernel panic, which is a regression, during module unload disappears." -- Vasanthakumar Thiagarajan <vasanth@atheros.com> Other patches in the series: ath9k: Add helper to get ath9k specific current channel ath9k: Make sure we have current channel in ah_curchan before rf disable/enable -- JWL) Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Cc: Luis Rodriguez <mcgrof@gmail.com> Tested-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
159cd468bc
commit
3b319aae42
5 changed files with 26 additions and 110 deletions
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@ -1,7 +1,6 @@
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config ATH9K
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tristate "Atheros 802.11n wireless cards support"
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depends on PCI && MAC80211 && WLAN_80211
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depends on RFKILL || RFKILL=n
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select ATH_COMMON
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select MAC80211_LEDS
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select LEDS_CLASS
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@ -21,7 +21,6 @@
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#include <linux/device.h>
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#include <net/mac80211.h>
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#include <linux/leds.h>
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#include <linux/rfkill.h>
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#include "hw.h"
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#include "rc.h"
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@ -460,12 +459,6 @@ struct ath_led {
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bool registered;
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};
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struct ath_rfkill {
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struct rfkill *rfkill;
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struct rfkill_ops ops;
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char rfkill_name[32];
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};
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/********************/
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/* Main driver core */
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/********************/
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@ -505,7 +498,6 @@ struct ath_rfkill {
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#define SC_OP_PROTECT_ENABLE BIT(6)
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#define SC_OP_RXFLUSH BIT(7)
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#define SC_OP_LED_ASSOCIATED BIT(8)
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#define SC_OP_RFKILL_REGISTERED BIT(9)
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#define SC_OP_WAIT_FOR_BEACON BIT(12)
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#define SC_OP_LED_ON BIT(13)
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#define SC_OP_SCANNING BIT(14)
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@ -591,7 +583,6 @@ struct ath_softc {
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int beacon_interval;
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struct ath_rfkill rf_kill;
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struct ath_ani ani;
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struct ath9k_node_stats nodestats;
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#ifdef CONFIG_ATH9K_DEBUG
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@ -2186,6 +2186,18 @@ static void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan
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REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
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}
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static void ath9k_enable_rfkill(struct ath_hw *ah)
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{
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REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
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AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
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REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
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AR_GPIO_INPUT_MUX2_RFSILENT);
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ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
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REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
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}
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int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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bool bChannelChange)
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{
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@ -2313,10 +2325,9 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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ath9k_hw_init_interrupt_masks(ah, ah->opmode);
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ath9k_hw_init_qos(ah);
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#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
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if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
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ath9k_enable_rfkill(ah);
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#endif
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ath9k_hw_init_user_settings(ah);
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REG_WRITE(ah, AR_STA_ID1,
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@ -3613,20 +3624,6 @@ void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val)
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AR_GPIO_BIT(gpio));
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}
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#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
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void ath9k_enable_rfkill(struct ath_hw *ah)
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{
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REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
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AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
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REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
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AR_GPIO_INPUT_MUX2_RFSILENT);
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ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
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REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
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}
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#endif
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u32 ath9k_hw_getdefantenna(struct ath_hw *ah)
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{
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return REG_READ(ah, AR_DEF_ANTENNA) & 0x7;
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@ -565,9 +565,6 @@ u32 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio);
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void ath9k_hw_cfg_output(struct ath_hw *ah, u32 gpio,
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u32 ah_signal_type);
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void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val);
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#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
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void ath9k_enable_rfkill(struct ath_hw *ah);
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#endif
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u32 ath9k_hw_getdefantenna(struct ath_hw *ah);
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void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna);
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bool ath9k_hw_setantennaswitch(struct ath_hw *ah,
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@ -1197,8 +1197,6 @@ void ath_radio_disable(struct ath_softc *sc)
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ath9k_ps_restore(sc);
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}
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#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
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/*******************/
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/* Rfkill */
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/*******************/
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@ -1211,82 +1209,28 @@ static bool ath_is_rfkill_set(struct ath_softc *sc)
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ah->rfkill_polarity;
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}
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/* s/w rfkill handlers */
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static int ath_rfkill_set_block(void *data, bool blocked)
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static void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
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{
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struct ath_softc *sc = data;
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struct ath_wiphy *aphy = hw->priv;
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struct ath_softc *sc = aphy->sc;
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bool blocked = !!ath_is_rfkill_set(sc);
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wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
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if (blocked)
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ath_radio_disable(sc);
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else
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ath_radio_enable(sc);
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return 0;
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}
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static void ath_rfkill_poll_state(struct rfkill *rfkill, void *data)
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static void ath_start_rfkill_poll(struct ath_softc *sc)
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{
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struct ath_softc *sc = data;
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bool blocked = !!ath_is_rfkill_set(sc);
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struct ath_hw *ah = sc->sc_ah;
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if (rfkill_set_hw_state(rfkill, blocked))
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ath_radio_disable(sc);
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else
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ath_radio_enable(sc);
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if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
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wiphy_rfkill_start_polling(sc->hw->wiphy);
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}
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/* Init s/w rfkill */
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static int ath_init_sw_rfkill(struct ath_softc *sc)
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{
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sc->rf_kill.ops.set_block = ath_rfkill_set_block;
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if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
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sc->rf_kill.ops.poll = ath_rfkill_poll_state;
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snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
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"ath9k-%s::rfkill", wiphy_name(sc->hw->wiphy));
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sc->rf_kill.rfkill = rfkill_alloc(sc->rf_kill.rfkill_name,
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wiphy_dev(sc->hw->wiphy),
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RFKILL_TYPE_WLAN,
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&sc->rf_kill.ops, sc);
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if (!sc->rf_kill.rfkill) {
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DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
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return -ENOMEM;
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}
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return 0;
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}
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/* Deinitialize rfkill */
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static void ath_deinit_rfkill(struct ath_softc *sc)
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{
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if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
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rfkill_unregister(sc->rf_kill.rfkill);
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rfkill_destroy(sc->rf_kill.rfkill);
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sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
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}
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}
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static int ath_start_rfkill_poll(struct ath_softc *sc)
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{
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if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
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if (rfkill_register(sc->rf_kill.rfkill)) {
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DPRINTF(sc, ATH_DBG_FATAL,
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"Unable to register rfkill\n");
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rfkill_destroy(sc->rf_kill.rfkill);
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/* Deinitialize the device */
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ath_cleanup(sc);
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return -EIO;
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} else {
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sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
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}
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}
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return 0;
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}
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#endif /* CONFIG_RFKILL */
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void ath_cleanup(struct ath_softc *sc)
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{
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ath_detach(sc);
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DPRINTF(sc, ATH_DBG_CONFIG, "Detach ATH hw\n");
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#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
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ath_deinit_rfkill(sc);
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#endif
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ath_deinit_leds(sc);
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cancel_work_sync(&sc->chan_work);
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cancel_delayed_work_sync(&sc->wiphy_work);
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@ -1645,13 +1586,6 @@ int ath_attach(u16 devid, struct ath_softc *sc)
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if (error != 0)
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goto error_attach;
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#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
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/* Initialize s/w rfkill */
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error = ath_init_sw_rfkill(sc);
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if (error)
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goto error_attach;
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#endif
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INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work);
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INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work);
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sc->wiphy_scheduler_int = msecs_to_jiffies(500);
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/* Initialize LED control */
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ath_init_leds(sc);
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ath_start_rfkill_poll(sc);
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return 0;
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@ -2035,10 +1970,6 @@ static int ath9k_start(struct ieee80211_hw *hw)
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ieee80211_wake_queues(hw);
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#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
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r = ath_start_rfkill_poll(sc);
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#endif
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mutex_unlock:
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mutex_unlock(&sc->mutex);
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} else
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sc->rx.rxlink = NULL;
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rfkill_pause_polling(sc->rf_kill.rfkill);
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wiphy_rfkill_stop_polling(sc->hw->wiphy);
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/* disable HAL and put h/w to sleep */
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ath9k_hw_disable(sc->sc_ah);
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.ampdu_action = ath9k_ampdu_action,
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.sw_scan_start = ath9k_sw_scan_start,
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.sw_scan_complete = ath9k_sw_scan_complete,
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.rfkill_poll = ath9k_rfkill_poll_state,
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};
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static struct {
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