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drm/amd/display: Clear OPTC mem select on disable

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[Why]
Not clearing the memory select bits prior to OPTC disable can cause DSC
corruption issues when attempting to reuse a memory instance for another
OPTC that enables ODM.

[How]
Clear the memory select bits prior to disabling an OPTC.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ilya Bakoulin 2024-01-03 09:42:04 -05:00 committed by Alex Deucher
parent 4b56f7d47b
commit 3ba2a0bfd8
2 changed files with 6 additions and 0 deletions
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3
drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c
View file

@ -173,6 +173,9 @@ static bool optc32_disable_crtc(struct timing_generator *optc)
OPTC_SEG3_SRC_SEL, 0xf,
OPTC_NUM_OF_INPUT_SEGMENT, 0);
REG_UPDATE(OPTC_MEMORY_CONFIG,
OPTC_MEM_SEL, 0);
/* disable otg request until end of the first line
* in the vertical blank region
*/

3
drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c
View file

@ -145,6 +145,9 @@ static bool optc35_disable_crtc(struct timing_generator *optc)
OPTC_SEG3_SRC_SEL, 0xf,
OPTC_NUM_OF_INPUT_SEGMENT, 0);
REG_UPDATE(OPTC_MEMORY_CONFIG,
OPTC_MEM_SEL, 0);
/* disable otg request until end of the first line
* in the vertical blank region
*/