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ARM: dts: rcar-gen2: Add missing mmio-sram bus properties

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"#address-cells", "#size-cells", and "ranges" are required properties
for devices nodes compatible with "mmio-sram", leading to warnings when
running "make dtbs_check":

    $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sram/sram.yaml
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#address-cells' is a required property
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: '#size-cells' is a required property
    arch/arm/boot/dts/r8a7791-koelsch.dt.yaml: sram@e63a0000: 'ranges' is a required property
    ...

Fix this by adding the missing properties to the mmio-sram device nodes
in the DTS files for all affected R-Car Gen2 and RZ/G1 SoCs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213162604.1890-1-geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2019-12-13 17:26:04 +01:00
parent 505128865a
commit 3bb426d042
9 changed files with 39 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
arch/arm/boot/dts/r8a7743.dtsi
View file

@ -399,6 +399,9 @@ ipmmu_gp: mmu@e62a0000 {
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63a0000 0x12000>;
};
icram1: sram@e63c0000 {
@ -417,6 +420,9 @@ smp-sram@0 {
icram2: sram@e6300000 {
compatible = "mmio-sram";
reg = <0 0xe6300000 0 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe6300000 0x40000>;
};
/* The memory map in the User's Manual maps the cores to

6
arch/arm/boot/dts/r8a7744.dtsi
View file

@ -399,6 +399,9 @@ ipmmu_gp: mmu@e62a0000 {
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63a0000 0x12000>;
};
icram1: sram@e63c0000 {
@ -417,6 +420,9 @@ smp-sram@0 {
icram2: sram@e6300000 {
compatible = "mmio-sram";
reg = <0 0xe6300000 0 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe6300000 0x40000>;
};
/* The memory map in the User's Manual maps the cores to

6
arch/arm/boot/dts/r8a7745.dtsi
View file

@ -363,6 +363,9 @@ ipmmu_gp: mmu@e62a0000 {
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63a0000 0x12000>;
};
icram1: sram@e63c0000 {
@ -381,6 +384,9 @@ smp-sram@0 {
icram2: sram@e6300000 {
compatible = "mmio-sram";
reg = <0 0xe6300000 0 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe6300000 0x40000>;
};
i2c0: i2c@e6508000 {
#address-cells = <1>;

6
arch/arm/boot/dts/r8a77470.dtsi
View file

@ -242,6 +242,9 @@ irqc: interrupt-controller@e61c0000 {
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63a0000 0x12000>;
};
icram1: sram@e63c0000 {
@ -260,6 +263,9 @@ smp-sram@0 {
icram2: sram@e6300000 {
compatible = "mmio-sram";
reg = <0 0xe6300000 0 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe6300000 0x20000>;
};
i2c0: i2c@e6508000 {

3
arch/arm/boot/dts/r8a7790.dtsi
View file

@ -487,6 +487,9 @@ ipmmu_rt: mmu@ffc80000 {
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63a0000 0x12000>;
};
icram1: sram@e63c0000 {

3
arch/arm/boot/dts/r8a7791.dtsi
View file

@ -420,6 +420,9 @@ ipmmu_gp: mmu@e62a0000 {
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63a0000 0x12000>;
};
icram1: sram@e63c0000 {

3
arch/arm/boot/dts/r8a7792.dtsi
View file

@ -345,6 +345,9 @@ irqc: interrupt-controller@e61c0000 {
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63a0000 0x12000>;
};
icram1: sram@e63c0000 {

3
arch/arm/boot/dts/r8a7793.dtsi
View file

@ -406,6 +406,9 @@ ipmmu_gp: mmu@e62a0000 {
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63a0000 0x12000>;
};
icram1: sram@e63c0000 {

3
arch/arm/boot/dts/r8a7794.dtsi
View file

@ -351,6 +351,9 @@ ipmmu_gp: mmu@e62a0000 {
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63a0000 0x12000>;
};
icram1: sram@e63c0000 {