mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 19:00:25 +00:00
ASoC: microchip: power saving features and cleanups
Merge series from Claudiu Beznea <claudiu.beznea@microchip.com>: The following series adds runtime PM and suspend to RAM features for mchp-pdmc driver. Along with it 2 cleanup patches were added: - patch 1/4: use vendor,device.yaml file format for Microchip AT91 ASoC bindings - patch 4/4: use FIELD_PREP() in mchp-spdiftx.c
This commit is contained in:
Mark Brown
commit
3bb46b2cc3
6 changed files with 105 additions and 56 deletions
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml#
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$id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip I2S Multi-Channel Controller
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/microchip,pdmc.yaml#
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$id: http://devicetree.org/schemas/sound/microchip,sama7g5-pdmc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip Pulse Density Microphone Controller
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/mchp,spdifrx.yaml#
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$id: http://devicetree.org/schemas/sound/microchip,sama7g5-spdifrx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip S/PDIF Rx Controller
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@ -1,7 +1,7 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/mchp,spdiftx.yaml#
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$id: http://devicetree.org/schemas/sound/microchip,sama7g5-spdiftx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip S/PDIF Tx Controller
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@ -11,6 +11,7 @@
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <sound/core.h>
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@ -112,10 +113,10 @@ struct mchp_pdmc {
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struct clk *pclk;
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struct clk *gclk;
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u32 pdmcen;
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u32 suspend_irq;
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int mic_no;
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int sinc_order;
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bool audio_filter_en;
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u8 gclk_enabled:1;
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};
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static const char *const mchp_pdmc_sinc_filter_order_text[] = {
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@ -454,13 +455,6 @@ static int mchp_pdmc_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct mchp_pdmc *dd = snd_soc_dai_get_drvdata(dai);
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int ret;
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ret = clk_prepare_enable(dd->pclk);
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if (ret) {
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dev_err(dd->dev, "failed to enable the peripheral clock: %d\n", ret);
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return ret;
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}
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regmap_write(dd->regmap, MCHP_PDMC_CR, MCHP_PDMC_CR_SWRST);
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@ -470,14 +464,6 @@ static int mchp_pdmc_startup(struct snd_pcm_substream *substream,
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return 0;
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}
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static void mchp_pdmc_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct mchp_pdmc *dd = snd_soc_dai_get_drvdata(dai);
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clk_disable_unprepare(dd->pclk);
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}
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static int mchp_pdmc_dai_probe(struct snd_soc_dai *dai)
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{
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struct mchp_pdmc *dd = snd_soc_dai_get_drvdata(dai);
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@ -594,11 +580,6 @@ static int mchp_pdmc_hw_params(struct snd_pcm_substream *substream,
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cfgr_val |= MCHP_PDMC_CFGR_BSSEL(i);
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}
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if (dd->gclk_enabled) {
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clk_disable_unprepare(dd->gclk);
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dd->gclk_enabled = 0;
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}
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for (osr_start = dd->audio_filter_en ? 64 : 8;
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osr_start <= 256 && best_diff_rate; osr_start *= 2) {
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long round_rate;
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@ -620,8 +601,12 @@ static int mchp_pdmc_hw_params(struct snd_pcm_substream *substream,
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return -EINVAL;
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}
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/* CLK is enabled by runtime PM. */
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clk_disable_unprepare(dd->gclk);
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/* set the rate */
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ret = clk_set_rate(dd->gclk, gclk_rate);
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clk_prepare_enable(dd->gclk);
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if (ret) {
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dev_err(comp->dev, "unable to set rate %lu to GCLK: %d\n",
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gclk_rate, ret);
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@ -636,9 +621,6 @@ static int mchp_pdmc_hw_params(struct snd_pcm_substream *substream,
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mr_val |= MCHP_PDMC_MR_CHUNK(dd->addr.maxburst);
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dev_dbg(comp->dev, "maxburst set to %d\n", dd->addr.maxburst);
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clk_prepare_enable(dd->gclk);
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dd->gclk_enabled = 1;
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snd_soc_component_update_bits(comp, MCHP_PDMC_MR,
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MCHP_PDMC_MR_OSR_MASK |
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MCHP_PDMC_MR_SINCORDER_MASK |
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@ -650,19 +632,6 @@ static int mchp_pdmc_hw_params(struct snd_pcm_substream *substream,
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return 0;
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}
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static int mchp_pdmc_hw_free(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct mchp_pdmc *dd = snd_soc_dai_get_drvdata(dai);
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if (dd->gclk_enabled) {
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clk_disable_unprepare(dd->gclk);
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dd->gclk_enabled = 0;
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}
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return 0;
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}
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static int mchp_pdmc_trigger(struct snd_pcm_substream *substream,
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int cmd, struct snd_soc_dai *dai)
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{
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@ -673,22 +642,27 @@ static int mchp_pdmc_trigger(struct snd_pcm_substream *substream,
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#endif
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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case SNDRV_PCM_TRIGGER_START:
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/* Enable overrun and underrun error interrupts */
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regmap_write(dd->regmap, MCHP_PDMC_IER,
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regmap_write(dd->regmap, MCHP_PDMC_IER, dd->suspend_irq |
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MCHP_PDMC_IR_RXOVR | MCHP_PDMC_IR_RXUDR);
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dd->suspend_irq = 0;
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fallthrough;
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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snd_soc_component_update_bits(cpu, MCHP_PDMC_MR,
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MCHP_PDMC_MR_PDMCEN_MASK,
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dd->pdmcen);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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regmap_read(dd->regmap, MCHP_PDMC_IMR, &dd->suspend_irq);
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fallthrough;
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case SNDRV_PCM_TRIGGER_STOP:
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/* Disable overrun and underrun error interrupts */
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regmap_write(dd->regmap, MCHP_PDMC_IDR,
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regmap_write(dd->regmap, MCHP_PDMC_IDR, dd->suspend_irq |
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MCHP_PDMC_IR_RXOVR | MCHP_PDMC_IR_RXUDR);
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fallthrough;
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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snd_soc_component_update_bits(cpu, MCHP_PDMC_MR,
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MCHP_PDMC_MR_PDMCEN_MASK, 0);
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break;
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@ -711,9 +685,7 @@ static int mchp_pdmc_trigger(struct snd_pcm_substream *substream,
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static const struct snd_soc_dai_ops mchp_pdmc_dai_ops = {
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.set_fmt = mchp_pdmc_set_fmt,
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.startup = mchp_pdmc_startup,
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.shutdown = mchp_pdmc_shutdown,
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.hw_params = mchp_pdmc_hw_params,
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.hw_free = mchp_pdmc_hw_free,
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.trigger = mchp_pdmc_trigger,
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};
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@ -864,6 +836,7 @@ static const struct regmap_config mchp_pdmc_regmap_config = {
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.readable_reg = mchp_pdmc_readable_reg,
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.writeable_reg = mchp_pdmc_writeable_reg,
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.precious_reg = mchp_pdmc_precious_reg,
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.cache_type = REGCACHE_FLAT,
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};
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static int mchp_pdmc_dt_init(struct mchp_pdmc *dd)
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@ -970,6 +943,49 @@ static struct snd_dmaengine_pcm_config mchp_pdmc_config = {
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.prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
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};
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static int mchp_pdmc_runtime_suspend(struct device *dev)
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{
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struct mchp_pdmc *dd = dev_get_drvdata(dev);
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regcache_cache_only(dd->regmap, true);
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clk_disable_unprepare(dd->gclk);
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clk_disable_unprepare(dd->pclk);
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return 0;
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}
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static int mchp_pdmc_runtime_resume(struct device *dev)
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{
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struct mchp_pdmc *dd = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(dd->pclk);
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if (ret) {
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dev_err(dd->dev,
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"failed to enable the peripheral clock: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(dd->gclk);
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if (ret) {
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dev_err(dd->dev,
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"failed to enable generic clock: %d\n", ret);
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goto disable_pclk;
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}
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regcache_cache_only(dd->regmap, false);
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regcache_mark_dirty(dd->regmap);
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ret = regcache_sync(dd->regmap);
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if (ret) {
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regcache_cache_only(dd->regmap, true);
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clk_disable_unprepare(dd->gclk);
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disable_pclk:
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clk_disable_unprepare(dd->pclk);
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}
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return ret;
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}
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static int mchp_pdmc_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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@ -1039,18 +1055,25 @@ static int mchp_pdmc_probe(struct platform_device *pdev)
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dd->addr.addr = (dma_addr_t)res->start + MCHP_PDMC_RHR;
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platform_set_drvdata(pdev, dd);
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pm_runtime_enable(dd->dev);
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if (!pm_runtime_enabled(dd->dev)) {
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ret = mchp_pdmc_runtime_resume(dd->dev);
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if (ret)
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return ret;
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}
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/* register platform */
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ret = devm_snd_dmaengine_pcm_register(dev, &mchp_pdmc_config, 0);
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if (ret) {
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dev_err(dev, "could not register platform: %d\n", ret);
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return ret;
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goto pm_runtime_suspend;
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}
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ret = devm_snd_soc_register_component(dev, &mchp_pdmc_dai_component,
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&mchp_pdmc_dai, 1);
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if (ret) {
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dev_err(dev, "could not register CPU DAI: %d\n", ret);
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return ret;
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goto pm_runtime_suspend;
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}
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/* print IP version */
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@ -1059,6 +1082,25 @@ static int mchp_pdmc_probe(struct platform_device *pdev)
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version & MCHP_PDMC_VER_VERSION);
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return 0;
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pm_runtime_suspend:
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if (!pm_runtime_status_suspended(dd->dev))
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mchp_pdmc_runtime_suspend(dd->dev);
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pm_runtime_disable(dd->dev);
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return ret;
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}
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static int mchp_pdmc_remove(struct platform_device *pdev)
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{
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struct mchp_pdmc *dd = platform_get_drvdata(pdev);
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if (!pm_runtime_status_suspended(dd->dev))
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mchp_pdmc_runtime_suspend(dd->dev);
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pm_runtime_disable(dd->dev);
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return 0;
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}
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static const struct of_device_id mchp_pdmc_of_match[] = {
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@ -1070,13 +1112,20 @@ static const struct of_device_id mchp_pdmc_of_match[] = {
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};
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MODULE_DEVICE_TABLE(of, mchp_pdmc_of_match);
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static const struct dev_pm_ops mchp_pdmc_pm_ops = {
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SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
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RUNTIME_PM_OPS(mchp_pdmc_runtime_suspend, mchp_pdmc_runtime_resume,
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NULL)
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};
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static struct platform_driver mchp_pdmc_driver = {
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.driver = {
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.name = "mchp-pdmc",
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.of_match_table = of_match_ptr(mchp_pdmc_of_match),
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.pm = &snd_soc_pm_ops,
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.pm = pm_ptr(&mchp_pdmc_pm_ops),
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},
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.probe = mchp_pdmc_probe,
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.remove = mchp_pdmc_remove,
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};
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module_platform_driver(mchp_pdmc_driver);
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@ -6,6 +6,7 @@
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//
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// Author: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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@ -71,11 +72,11 @@
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/* Valid Bits per Sample */
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#define SPDIFTX_MR_VBPS_MASK GENMASK(13, 8)
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#define SPDIFTX_MR_VBPS(bps) (((bps) << 8) & SPDIFTX_MR_VBPS_MASK)
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#define SPDIFTX_MR_VBPS(bps) FIELD_PREP(SPDIFTX_MR_VBPS_MASK, bps)
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/* Chunk Size */
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#define SPDIFTX_MR_CHUNK_MASK GENMASK(19, 16)
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#define SPDIFTX_MR_CHUNK(size) (((size) << 16) & SPDIFTX_MR_CHUNK_MASK)
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#define SPDIFTX_MR_CHUNK(size) FIELD_PREP(SPDIFTX_MR_CHUNK_MASK, size)
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/* Validity Bits for Channels 1 and 2 */
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#define SPDIFTX_MR_VALID1 BIT(24)
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@ -88,8 +89,7 @@
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/* Bytes per Sample */
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#define SPDIFTX_MR_BPS_MASK GENMASK(29, 28)
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#define SPDIFTX_MR_BPS(bytes) \
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((((bytes) - 1) << 28) & SPDIFTX_MR_BPS_MASK)
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#define SPDIFTX_MR_BPS(bytes) FIELD_PREP(SPDIFTX_MR_BPS_MASK, (bytes - 1))
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/*
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* ---- Interrupt Enable/Disable/Mask/Status Register (Write/Read-only) ----
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