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drm/i915/dg2: Add support for new DG2-G11 revid 0x5
The bspec has been updated with a new revision 0x5 that translates to B1 GT stepping and C0 display stepping. Bspec: 44477 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210805163647.801064-2-matthew.d.roper@intel.com
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@ -118,6 +118,7 @@ static const struct intel_step_info dg2_g10_revid_step_tbl[] = {
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static const struct intel_step_info dg2_g11_revid_step_tbl[] = {
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[0x0] = { .gt_step = STEP_A0, .display_step = STEP_B0 },
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[0x4] = { .gt_step = STEP_B0, .display_step = STEP_C0 },
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[0x5] = { .gt_step = STEP_B1, .display_step = STEP_C0 },
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};
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void intel_step_init(struct drm_i915_private *i915)
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