dt-bindings: clock: exynosautov9: add fsys1 clock definitions

Add fsys1(for usb and mmc) clock definitions.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/debb6335cb2bcc935f7572bed25d76a85e80cfaa.1659054220.git.chanho61.park@samsung.com
This commit is contained in:
Chanho Park 2022-07-29 09:30:20 +09:00 committed by Krzysztof Kozlowski
parent 153da489e5
commit 3c073243c5

View file

@ -228,6 +228,31 @@
#define FSYS0_NR_CLK 37
/* CMU_FSYS1 */
#define FOUT_MMC_PLL 1
#define CLK_MOUT_FSYS1_BUS_USER 2
#define CLK_MOUT_FSYS1_MMC_PLL 3
#define CLK_MOUT_FSYS1_MMC_CARD_USER 4
#define CLK_MOUT_FSYS1_USBDRD_USER 5
#define CLK_MOUT_FSYS1_MMC_CARD 6
#define CLK_DOUT_FSYS1_MMC_CARD 7
#define CLK_GOUT_FSYS1_PCLK 8
#define CLK_GOUT_FSYS1_MMC_CARD_SDCLKIN 9
#define CLK_GOUT_FSYS1_MMC_CARD_ACLK 10
#define CLK_GOUT_FSYS1_USB20DRD_0_REFCLK 11
#define CLK_GOUT_FSYS1_USB20DRD_1_REFCLK 12
#define CLK_GOUT_FSYS1_USB30DRD_0_REFCLK 13
#define CLK_GOUT_FSYS1_USB30DRD_1_REFCLK 14
#define CLK_GOUT_FSYS1_USB20_0_ACLK 15
#define CLK_GOUT_FSYS1_USB20_1_ACLK 16
#define CLK_GOUT_FSYS1_USB30_0_ACLK 17
#define CLK_GOUT_FSYS1_USB30_1_ACLK 18
#define FSYS1_NR_CLK 19
/* CMU_FSYS2 */
#define CLK_MOUT_FSYS2_BUS_USER 1
#define CLK_MOUT_FSYS2_UFS_EMBD_USER 2