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drm/radeon/rs780: implement get_current_sclk/mclk
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3 changed files with 26 additions and 0 deletions
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@ -1170,6 +1170,8 @@ static struct radeon_asic rs780_asic = {
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.print_power_state = &rs780_dpm_print_power_state,
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.debugfs_print_current_performance_level = &rs780_dpm_debugfs_print_current_performance_level,
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.force_performance_level = &rs780_dpm_force_performance_level,
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.get_current_sclk = &rs780_dpm_get_current_sclk,
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.get_current_mclk = &rs780_dpm_get_current_mclk,
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},
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.pflip = {
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.page_flip = &rs600_page_flip,
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@ -449,6 +449,8 @@ void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
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struct seq_file *m);
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int rs780_dpm_force_performance_level(struct radeon_device *rdev,
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enum radeon_dpm_forced_level level);
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u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev);
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u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev);
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/*
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* rv770,rv730,rv710,rv740
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@ -1001,6 +1001,28 @@ void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rde
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ps->sclk_high, ps->max_voltage);
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}
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/* get the current sclk in 10 khz units */
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u32 rs780_dpm_get_current_sclk(struct radeon_device *rdev)
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{
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u32 current_fb_div = RREG32(FVTHROT_STATUS_REG0) & CURRENT_FEEDBACK_DIV_MASK;
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u32 func_cntl = RREG32(CG_SPLL_FUNC_CNTL);
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u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
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u32 post_div = ((func_cntl & SPLL_SW_HILEN_MASK) >> SPLL_SW_HILEN_SHIFT) + 1 +
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((func_cntl & SPLL_SW_LOLEN_MASK) >> SPLL_SW_LOLEN_SHIFT) + 1;
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u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) /
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(post_div * ref_div);
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return sclk;
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}
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/* get the current mclk in 10 khz units */
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u32 rs780_dpm_get_current_mclk(struct radeon_device *rdev)
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{
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struct igp_power_info *pi = rs780_get_pi(rdev);
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return pi->bootup_uma_clk;
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}
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int rs780_dpm_force_performance_level(struct radeon_device *rdev,
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enum radeon_dpm_forced_level level)
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{
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