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ASoC: rt298: reset AD dilter is there is no MCLK
rt298 need to reset AD filter and the ADC settings will take effort. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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f55532a0c0
commit
3c9e014c44
2 changed files with 22 additions and 0 deletions
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@ -481,6 +481,26 @@ static int rt298_adc_event(struct snd_soc_dapm_widget *w,
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snd_soc_update_bits(codec,
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VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
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0x7080, 0x7000);
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/* If MCLK doesn't exist, reset AD filter */
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if (!(snd_soc_read(codec, RT298_VAD_CTRL) & 0x200)) {
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pr_info("NO MCLK\n");
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switch (nid) {
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case RT298_ADC_IN1:
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snd_soc_update_bits(codec,
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RT298_D_FILTER_CTRL, 0x2, 0x2);
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mdelay(10);
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snd_soc_update_bits(codec,
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RT298_D_FILTER_CTRL, 0x2, 0x0);
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break;
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case RT298_ADC_IN2:
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snd_soc_update_bits(codec,
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RT298_D_FILTER_CTRL, 0x4, 0x4);
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mdelay(10);
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snd_soc_update_bits(codec,
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RT298_D_FILTER_CTRL, 0x4, 0x0);
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break;
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}
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}
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break;
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case SND_SOC_DAPM_PRE_PMD:
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snd_soc_update_bits(codec,
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@ -137,6 +137,7 @@
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#define RT298_A_BIAS_CTRL2 0x02
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#define RT298_POWER_CTRL1 0x03
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#define RT298_A_BIAS_CTRL3 0x04
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#define RT298_D_FILTER_CTRL 0x05
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#define RT298_POWER_CTRL2 0x08
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#define RT298_I2S_CTRL1 0x09
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#define RT298_I2S_CTRL2 0x0a
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@ -148,6 +149,7 @@
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#define RT298_IRQ_CTRL 0x33
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#define RT298_WIND_FILTER_CTRL 0x46
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#define RT298_PLL_CTRL1 0x49
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#define RT298_VAD_CTRL 0x4e
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#define RT298_CBJ_CTRL1 0x4f
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#define RT298_CBJ_CTRL2 0x50
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#define RT298_PLL_CTRL 0x63
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