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ARM: SoC fixes for 3.12

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A small batch of fixes that have trickled in over the last week of the
 merge window.
 
 Also included are few small devicetree updates for sunxi, since it
 enables me to use one of their newer boards (cubieboard2) for additional
 test coverage. The support for that SoC is new for 3.12, so there's no
 exposure to new regressions due to it.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJSMhzcAAoJEIwa5zzehBx3Q/8P/AufAcFpBGAFxxu31S2Uplcu
 TKwUOqQcTlIFB6IEJ6fDnkhFYB/XFcak3V1IpN2OgVhhW/Z4GGxPYlRgWmq+zO2/
 RHpChiPOvbIjV911dSwGIjIomoWtBvZuYBa/EPZ2KFzEx+NtiG9bUNbS5C1HgYeE
 6pqMUb1wfAW7ijdTx/uKNFhVuOOHRqjFLaQ2IBnCJTCB6FVyVobsLLsdc+8ZBnZj
 xCgnjzriNUpP9MwNsllv8bh6B03ugrjJMYZZle7ADysFUV7Q+kZ/RN+13TiQABRK
 dXbDKBlXFFUCDrSfy0b3NR8z69TKFgx9cxeK4TBpBzRS5UQBUXstGKGKh3h0k11G
 pN65rUWlldMM/V3hKozFdvS89mM28Ofj7xT6ivXdJhtx6F+7NIyO18YGszlwqPqa
 6DyQBQQdqcfJAKZr6ZezHSZHN5x1sZZyLkC/4MVYWAUDOE2gq+2+GYU5DCchPeUK
 KQ5mt+zRwlSUCCwDkTa40xiesFLsmrda8KclnoXxR7twGB6acGpulS/hxQe4EFpL
 VrOWPhxKQDQKlz7l8wdnice6J4BgfC/CYkui96Szpe1Nl7I+LGpyD/8wxzwUr/OV
 L3zLRdOHzgrR75zXMKHJmFcg38geD5qeoL6RkeHK1rEOMDrQlzl9H1IKj2ff0/sk
 loA69alLYJA5RgSMgbDW
 =HLjK
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A small batch of fixes that have trickled in over the last week of the
  merge window.

  Also included are few small devicetree updates for sunxi, since it
  enables me to use one of their newer boards (cubieboard2) for
  additional test coverage.  The support for that SoC is new for 3.12,
  so there's no exposure to new regressions due to it"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: dts: sun7i: olinuxino-micro: Enable the EMAC
  ARM: dts: sun7i: cubieboard2: Enable the EMAC
  ARM: dts: sun7i: Add the muxing options for the EMAC
  ARM: dts: sun7i: Enable the Ethernet in the A20
  i2c: davinci: Fix bad dev_get_platdata() conversion
  ARM: vexpress: allow dcscb and tc2_pm in a combined ARMv6+v7 build
  ARM: shmobile: lager: Do not use register_type field of struct sh_eth_plat_data
  ARM: pxa: ssp: Check return values from phandle lookups
  ARM: PCI: versatile: Fix SMAP register offsets
  ARM: PCI: versatile: Fix PCI I/O
  ARM: PCI: versatile: Fix map_irq function to match hardware
  ARM: ep93xx: Don't use modem interface on the second UART
  ARM: shmobile: r8a7779: Update early timer initialisation order
This commit is contained in:
Linus Torvalds 2013-09-12 13:59:31 -07:00
commit 3cc69b638e
11 changed files with 108 additions and 25 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
View file

@ -19,6 +19,21 @@ / {
compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
soc@01c00000 {
emac: ethernet@01c0b000 {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
mdio@01c0b080 {
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
pinctrl@01c20800 {
led_pins_cubieboard2: led_pins@0 {
allwinner,pins = "PH20", "PH21";

15
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
View file

@ -19,6 +19,21 @@ / {
compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
soc@01c00000 {
emac: ethernet@01c0b000 {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};
mdio@01c0b080 {
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
pinctrl@01c20800 {
led_pins_olinuxino: led_pins@0 {
allwinner,pins = "PH2";

27
arch/arm/boot/dts/sun7i-a20.dtsi
View file

@ -167,6 +167,22 @@ soc@01c00000 {
#size-cells = <1>;
ranges;
emac: ethernet@01c0b000 {
compatible = "allwinner,sun4i-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <0 55 1>;
clocks = <&ahb_gates 17>;
status = "disabled";
};
mdio@01c0b080 {
compatible = "allwinner,sun4i-mdio";
reg = <0x01c0b080 0x14>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
pio: pinctrl@01c20800 {
compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>;
@ -198,6 +214,17 @@ uart7_pins_a: uart7@0 {
allwinner,drive = <0>;
allwinner,pull = <0>;
};
emac_pins_a: emac0@0 {
allwinner,pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
"PA7", "PA8", "PA9", "PA10",
"PA11", "PA12", "PA13", "PA14",
"PA15", "PA16";
allwinner,function = "emac";
allwinner,drive = <0>;
allwinner,pull = <0>;
};
};
timer@01c20c00 {

2
arch/arm/mach-ep93xx/core.c
View file

@ -281,7 +281,7 @@ static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
{ IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
{ IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
{ IRQ_EP93XX_UART2 }, NULL);
static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
{ IRQ_EP93XX_UART3 }, &ep93xx_uart_data);

1
arch/arm/mach-shmobile/board-lager.c
View file

@ -96,7 +96,6 @@ static struct resource mmcif1_resources[] __initdata = {
static struct sh_eth_plat_data ether_pdata __initdata = {
.phy = 0x1,
.edmac_endian = EDMAC_LITTLE_ENDIAN,
.register_type = SH_ETH_REG_FAST_RCAR,
.phy_interface = PHY_INTERFACE_MODE_RMII,
.ether_link_active_low = 1,
};

2
arch/arm/mach-shmobile/setup-r8a7779.c
View file

@ -691,8 +691,8 @@ void __init __weak r8a7779_register_twd(void) { }
void __init r8a7779_earlytimer_init(void)
{
r8a7779_clock_init();
shmobile_earlytimer_init();
r8a7779_register_twd();
shmobile_earlytimer_init();
}
void __init r8a7779_add_early_devices(void)

2
arch/arm/mach-versatile/include/mach/platform.h
View file

@ -231,12 +231,14 @@
/* PCI space */
#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */
#define VERSATILE_PCI_CFG_BASE 0x42000000
#define VERSATILE_PCI_IO_BASE 0x43000000
#define VERSATILE_PCI_MEM_BASE0 0x44000000
#define VERSATILE_PCI_MEM_BASE1 0x50000000
#define VERSATILE_PCI_MEM_BASE2 0x60000000
/* Sizes of above maps */
#define VERSATILE_PCI_BASE_SIZE 0x01000000
#define VERSATILE_PCI_CFG_BASE_SIZE 0x02000000
#define VERSATILE_PCI_IO_BASE_SIZE 0x01000000
#define VERSATILE_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
#define VERSATILE_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
#define VERSATILE_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */

47
arch/arm/mach-versatile/pci.c
View file

@ -43,9 +43,9 @@
#define PCI_IMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x0)
#define PCI_IMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x4)
#define PCI_IMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x8)
#define PCI_SMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x10)
#define PCI_SMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x14)
#define PCI_SMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x18)
#define PCI_SMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x14)
#define PCI_SMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x18)
#define PCI_SMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x1c)
#define PCI_SELFID __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0xc)
#define DEVICE_ID_OFFSET 0x00
@ -170,8 +170,8 @@ static struct pci_ops pci_versatile_ops = {
.write = versatile_write_config,
};
static struct resource io_mem = {
.name = "PCI I/O space",
static struct resource unused_mem = {
.name = "PCI unused",
.start = VERSATILE_PCI_MEM_BASE0,
.end = VERSATILE_PCI_MEM_BASE0+VERSATILE_PCI_MEM_BASE0_SIZE-1,
.flags = IORESOURCE_MEM,
@ -195,9 +195,9 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
{
int ret = 0;
ret = request_resource(&iomem_resource, &io_mem);
ret = request_resource(&iomem_resource, &unused_mem);
if (ret) {
printk(KERN_ERR "PCI: unable to allocate I/O "
printk(KERN_ERR "PCI: unable to allocate unused "
"memory region (%d)\n", ret);
goto out;
}
@ -205,7 +205,7 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
if (ret) {
printk(KERN_ERR "PCI: unable to allocate non-prefetchable "
"memory region (%d)\n", ret);
goto release_io_mem;
goto release_unused_mem;
}
ret = request_resource(&iomem_resource, &pre_mem);
if (ret) {
@ -225,8 +225,8 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
release_non_mem:
release_resource(&non_mem);
release_io_mem:
release_resource(&io_mem);
release_unused_mem:
release_resource(&unused_mem);
out:
return ret;
}
@ -246,7 +246,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
goto out;
}
ret = pci_ioremap_io(0, VERSATILE_PCI_MEM_BASE0);
ret = pci_ioremap_io(0, VERSATILE_PCI_IO_BASE);
if (ret)
goto out;
@ -294,6 +294,19 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
__raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
__raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
/*
* For many years the kernel and QEMU were symbiotically buggy
* in that they both assumed the same broken IRQ mapping.
* QEMU therefore attempts to auto-detect old broken kernels
* so that they still work on newer QEMU as they did on old
* QEMU. Since we now use the correct (ie matching-hardware)
* IRQ mapping we write a definitely different value to a
* PCI_INTERRUPT_LINE register to tell QEMU that we expect
* real hardware behaviour and it need not be backwards
* compatible for us. This write is harmless on real hardware.
*/
__raw_writel(0, VERSATILE_PCI_VIRT_BASE+PCI_INTERRUPT_LINE);
/*
* Do not to map Versatile FPGA PCI device into memory space
*/
@ -327,13 +340,13 @@ static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
int irq;
/* slot, pin, irq
* 24 1 IRQ_SIC_PCI0
* 25 1 IRQ_SIC_PCI1
* 26 1 IRQ_SIC_PCI2
* 27 1 IRQ_SIC_PCI3
/*
* Slot INTA INTB INTC INTD
* 31 PCI1 PCI2 PCI3 PCI0
* 30 PCI0 PCI1 PCI2 PCI3
* 29 PCI3 PCI0 PCI1 PCI2
*/
irq = IRQ_SIC_PCI0 + ((slot - 24 + pin - 1) & 3);
irq = IRQ_SIC_PCI0 + ((slot + 2 + pin - 1) & 3);
return irq;
}

2
arch/arm/mach-vexpress/Makefile
View file

@ -7,6 +7,8 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
obj-y := v2m.o
obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o
obj-$(CONFIG_ARCH_VEXPRESS_DCSCB) += dcscb.o dcscb_setup.o
CFLAGS_dcscb.o += -march=armv7-a
obj-$(CONFIG_ARCH_VEXPRESS_TC2_PM) += tc2_pm.o spc.o
CFLAGS_tc2_pm.o += -march=armv7-a
obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o

18
arch/arm/plat-pxa/ssp.c
View file

@ -132,6 +132,7 @@ static int pxa_ssp_probe(struct platform_device *pdev)
if (dev->of_node) {
struct of_phandle_args dma_spec;
struct device_node *np = dev->of_node;
int ret;
/*
* FIXME: we should allocate the DMA channel from this
@ -140,14 +141,23 @@ static int pxa_ssp_probe(struct platform_device *pdev)
*/
/* rx */
of_parse_phandle_with_args(np, "dmas", "#dma-cells",
0, &dma_spec);
ret = of_parse_phandle_with_args(np, "dmas", "#dma-cells",
0, &dma_spec);
if (ret) {
dev_err(dev, "Can't parse dmas property\n");
return -ENODEV;
}
ssp->drcmr_rx = dma_spec.args[0];
of_node_put(dma_spec.np);
/* tx */
of_parse_phandle_with_args(np, "dmas", "#dma-cells",
1, &dma_spec);
ret = of_parse_phandle_with_args(np, "dmas", "#dma-cells",
1, &dma_spec);
if (ret) {
dev_err(dev, "Can't parse dmas property\n");
return -ENODEV;
}
ssp->drcmr_tx = dma_spec.args[0];
of_node_put(dma_spec.np);
} else {

2
drivers/i2c/busses/i2c-davinci.c
View file

@ -662,7 +662,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
#endif
dev->dev = &pdev->dev;
dev->irq = irq->start;
dev->pdata = dev_get_platdata(&dev->dev);
dev->pdata = dev_get_platdata(&pdev->dev);
platform_set_drvdata(pdev, dev);
if (!dev->pdata && pdev->dev.of_node) {