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[media] s5p-fimc: Prefix format enumerations with FIMC_FMT_

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Prefix the pixel format enumerations with FIMC_FMT_ to make it more clear,
especially when used in new IP drivers, like fimc-lite, etc. Also add IO_
prefix in the input/output enumeration.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Sylwester Nawrocki 2012-04-26 06:26:29 -03:00 committed by Mauro Carvalho Chehab
parent 0f735f5236
commit 3d112d9ace
5 changed files with 81 additions and 76 deletions
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4
drivers/media/video/s5p-fimc/fimc-capture.c
View file

@ -1524,8 +1524,8 @@ static int fimc_register_capture_device(struct fimc_dev *fimc,
return -ENOMEM; return -ENOMEM;
ctx->fimc_dev = fimc; ctx->fimc_dev = fimc;
ctx->in_path = FIMC_CAMERA; ctx->in_path = FIMC_IO_CAMERA;
ctx->out_path = FIMC_DMA; ctx->out_path = FIMC_IO_DMA;
ctx->state = FIMC_CTX_CAP; ctx->state = FIMC_CTX_CAP;
ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0); ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
ctx->d_frame.fmt = ctx->s_frame.fmt; ctx->d_frame.fmt = ctx->s_frame.fmt;

56
drivers/media/video/s5p-fimc/fimc-core.c
View file

@ -40,7 +40,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "RGB565", .name = "RGB565",
.fourcc = V4L2_PIX_FMT_RGB565, .fourcc = V4L2_PIX_FMT_RGB565,
.depth = { 16 }, .depth = { 16 },
.color = S5P_FIMC_RGB565, .color = FIMC_FMT_RGB565,
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
.flags = FMT_FLAGS_M2M, .flags = FMT_FLAGS_M2M,
@ -48,7 +48,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "BGR666", .name = "BGR666",
.fourcc = V4L2_PIX_FMT_BGR666, .fourcc = V4L2_PIX_FMT_BGR666,
.depth = { 32 }, .depth = { 32 },
.color = S5P_FIMC_RGB666, .color = FIMC_FMT_RGB666,
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
.flags = FMT_FLAGS_M2M, .flags = FMT_FLAGS_M2M,
@ -56,7 +56,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "ARGB8888, 32 bpp", .name = "ARGB8888, 32 bpp",
.fourcc = V4L2_PIX_FMT_RGB32, .fourcc = V4L2_PIX_FMT_RGB32,
.depth = { 32 }, .depth = { 32 },
.color = S5P_FIMC_RGB888, .color = FIMC_FMT_RGB888,
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
.flags = FMT_FLAGS_M2M | FMT_HAS_ALPHA, .flags = FMT_FLAGS_M2M | FMT_HAS_ALPHA,
@ -64,7 +64,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "ARGB1555", .name = "ARGB1555",
.fourcc = V4L2_PIX_FMT_RGB555, .fourcc = V4L2_PIX_FMT_RGB555,
.depth = { 16 }, .depth = { 16 },
.color = S5P_FIMC_RGB555, .color = FIMC_FMT_RGB555,
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
.flags = FMT_FLAGS_M2M_OUT | FMT_HAS_ALPHA, .flags = FMT_FLAGS_M2M_OUT | FMT_HAS_ALPHA,
@ -72,7 +72,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "ARGB4444", .name = "ARGB4444",
.fourcc = V4L2_PIX_FMT_RGB444, .fourcc = V4L2_PIX_FMT_RGB444,
.depth = { 16 }, .depth = { 16 },
.color = S5P_FIMC_RGB444, .color = FIMC_FMT_RGB444,
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
.flags = FMT_FLAGS_M2M_OUT | FMT_HAS_ALPHA, .flags = FMT_FLAGS_M2M_OUT | FMT_HAS_ALPHA,
@ -80,7 +80,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "YUV 4:2:2 packed, YCbYCr", .name = "YUV 4:2:2 packed, YCbYCr",
.fourcc = V4L2_PIX_FMT_YUYV, .fourcc = V4L2_PIX_FMT_YUYV,
.depth = { 16 }, .depth = { 16 },
.color = S5P_FIMC_YCBYCR422, .color = FIMC_FMT_YCBYCR422,
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
.mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
@ -89,7 +89,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "YUV 4:2:2 packed, CbYCrY", .name = "YUV 4:2:2 packed, CbYCrY",
.fourcc = V4L2_PIX_FMT_UYVY, .fourcc = V4L2_PIX_FMT_UYVY,
.depth = { 16 }, .depth = { 16 },
.color = S5P_FIMC_CBYCRY422, .color = FIMC_FMT_CBYCRY422,
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
.mbus_code = V4L2_MBUS_FMT_UYVY8_2X8, .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
@ -98,7 +98,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "YUV 4:2:2 packed, CrYCbY", .name = "YUV 4:2:2 packed, CrYCbY",
.fourcc = V4L2_PIX_FMT_VYUY, .fourcc = V4L2_PIX_FMT_VYUY,
.depth = { 16 }, .depth = { 16 },
.color = S5P_FIMC_CRYCBY422, .color = FIMC_FMT_CRYCBY422,
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
.mbus_code = V4L2_MBUS_FMT_VYUY8_2X8, .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
@ -107,7 +107,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "YUV 4:2:2 packed, YCrYCb", .name = "YUV 4:2:2 packed, YCrYCb",
.fourcc = V4L2_PIX_FMT_YVYU, .fourcc = V4L2_PIX_FMT_YVYU,
.depth = { 16 }, .depth = { 16 },
.color = S5P_FIMC_YCRYCB422, .color = FIMC_FMT_YCRYCB422,
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
.mbus_code = V4L2_MBUS_FMT_YVYU8_2X8, .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
@ -116,7 +116,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "YUV 4:2:2 planar, Y/Cb/Cr", .name = "YUV 4:2:2 planar, Y/Cb/Cr",
.fourcc = V4L2_PIX_FMT_YUV422P, .fourcc = V4L2_PIX_FMT_YUV422P,
.depth = { 12 }, .depth = { 12 },
.color = S5P_FIMC_YCBYCR422, .color = FIMC_FMT_YCBYCR422,
.memplanes = 1, .memplanes = 1,
.colplanes = 3, .colplanes = 3,
.flags = FMT_FLAGS_M2M, .flags = FMT_FLAGS_M2M,
@ -124,7 +124,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "YUV 4:2:2 planar, Y/CbCr", .name = "YUV 4:2:2 planar, Y/CbCr",
.fourcc = V4L2_PIX_FMT_NV16, .fourcc = V4L2_PIX_FMT_NV16,
.depth = { 16 }, .depth = { 16 },
.color = S5P_FIMC_YCBYCR422, .color = FIMC_FMT_YCBYCR422,
.memplanes = 1, .memplanes = 1,
.colplanes = 2, .colplanes = 2,
.flags = FMT_FLAGS_M2M, .flags = FMT_FLAGS_M2M,
@ -132,7 +132,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "YUV 4:2:2 planar, Y/CrCb", .name = "YUV 4:2:2 planar, Y/CrCb",
.fourcc = V4L2_PIX_FMT_NV61, .fourcc = V4L2_PIX_FMT_NV61,
.depth = { 16 }, .depth = { 16 },
.color = S5P_FIMC_YCRYCB422, .color = FIMC_FMT_YCRYCB422,
.memplanes = 1, .memplanes = 1,
.colplanes = 2, .colplanes = 2,
.flags = FMT_FLAGS_M2M, .flags = FMT_FLAGS_M2M,
@ -140,7 +140,7 @@ static struct fimc_fmt fimc_formats[] = {
.name = "YUV 4:2:0 planar, YCbCr", .name = "YUV 4:2:0 planar, YCbCr",
.fourcc = V4L2_PIX_FMT_YUV420, .fourcc = V4L2_PIX_FMT_YUV420,
.depth = { 12 }, .depth = { 12 },
.color = S5P_FIMC_YCBCR420, .color = FIMC_FMT_YCBCR420,
.memplanes = 1, .memplanes = 1,
.colplanes = 3, .colplanes = 3,
.flags = FMT_FLAGS_M2M, .flags = FMT_FLAGS_M2M,
@ -148,14 +148,14 @@ static struct fimc_fmt fimc_formats[] = {
.name = "YUV 4:2:0 planar, Y/CbCr", .name = "YUV 4:2:0 planar, Y/CbCr",
.fourcc = V4L2_PIX_FMT_NV12, .fourcc = V4L2_PIX_FMT_NV12,
.depth = { 12 }, .depth = { 12 },
.color = S5P_FIMC_YCBCR420, .color = FIMC_FMT_YCBCR420,
.memplanes = 1, .memplanes = 1,
.colplanes = 2, .colplanes = 2,
.flags = FMT_FLAGS_M2M, .flags = FMT_FLAGS_M2M,
}, { }, {
.name = "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr", .name = "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr",
.fourcc = V4L2_PIX_FMT_NV12M, .fourcc = V4L2_PIX_FMT_NV12M,
.color = S5P_FIMC_YCBCR420, .color = FIMC_FMT_YCBCR420,
.depth = { 8, 4 }, .depth = { 8, 4 },
.memplanes = 2, .memplanes = 2,
.colplanes = 2, .colplanes = 2,
@ -163,7 +163,7 @@ static struct fimc_fmt fimc_formats[] = {
}, { }, {
.name = "YUV 4:2:0 non-contiguous 3-planar, Y/Cb/Cr", .name = "YUV 4:2:0 non-contiguous 3-planar, Y/Cb/Cr",
.fourcc = V4L2_PIX_FMT_YUV420M, .fourcc = V4L2_PIX_FMT_YUV420M,
.color = S5P_FIMC_YCBCR420, .color = FIMC_FMT_YCBCR420,
.depth = { 8, 2, 2 }, .depth = { 8, 2, 2 },
.memplanes = 3, .memplanes = 3,
.colplanes = 3, .colplanes = 3,
@ -171,7 +171,7 @@ static struct fimc_fmt fimc_formats[] = {
}, { }, {
.name = "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr, tiled", .name = "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr, tiled",
.fourcc = V4L2_PIX_FMT_NV12MT, .fourcc = V4L2_PIX_FMT_NV12MT,
.color = S5P_FIMC_YCBCR420, .color = FIMC_FMT_YCBCR420,
.depth = { 8, 4 }, .depth = { 8, 4 },
.memplanes = 2, .memplanes = 2,
.colplanes = 2, .colplanes = 2,
@ -179,7 +179,7 @@ static struct fimc_fmt fimc_formats[] = {
}, { }, {
.name = "JPEG encoded data", .name = "JPEG encoded data",
.fourcc = V4L2_PIX_FMT_JPEG, .fourcc = V4L2_PIX_FMT_JPEG,
.color = S5P_FIMC_JPEG, .color = FIMC_FMT_JPEG,
.depth = { 8 }, .depth = { 8 },
.memplanes = 1, .memplanes = 1,
.colplanes = 1, .colplanes = 1,
@ -361,7 +361,7 @@ int fimc_prepare_addr(struct fimc_ctx *ctx, struct vb2_buffer *vb,
case 3: case 3:
paddr->cb = (u32)(paddr->y + pix_size); paddr->cb = (u32)(paddr->y + pix_size);
/* decompose Y into Y/Cb/Cr */ /* decompose Y into Y/Cb/Cr */
if (S5P_FIMC_YCBCR420 == frame->fmt->color) if (FIMC_FMT_YCBCR420 == frame->fmt->color)
paddr->cr = (u32)(paddr->cb paddr->cr = (u32)(paddr->cb
+ (pix_size >> 2)); + (pix_size >> 2));
else /* 422 */ else /* 422 */
@ -394,16 +394,16 @@ void fimc_set_yuv_order(struct fimc_ctx *ctx)
/* Set order for 1 plane input formats. */ /* Set order for 1 plane input formats. */
switch (ctx->s_frame.fmt->color) { switch (ctx->s_frame.fmt->color) {
case S5P_FIMC_YCRYCB422: case FIMC_FMT_YCRYCB422:
ctx->in_order_1p = FIMC_REG_MSCTRL_ORDER422_CBYCRY; ctx->in_order_1p = FIMC_REG_MSCTRL_ORDER422_CBYCRY;
break; break;
case S5P_FIMC_CBYCRY422: case FIMC_FMT_CBYCRY422:
ctx->in_order_1p = FIMC_REG_MSCTRL_ORDER422_YCRYCB; ctx->in_order_1p = FIMC_REG_MSCTRL_ORDER422_YCRYCB;
break; break;
case S5P_FIMC_CRYCBY422: case FIMC_FMT_CRYCBY422:
ctx->in_order_1p = FIMC_REG_MSCTRL_ORDER422_YCBYCR; ctx->in_order_1p = FIMC_REG_MSCTRL_ORDER422_YCBYCR;
break; break;
case S5P_FIMC_YCBYCR422: case FIMC_FMT_YCBYCR422:
default: default:
ctx->in_order_1p = FIMC_REG_MSCTRL_ORDER422_CRYCBY; ctx->in_order_1p = FIMC_REG_MSCTRL_ORDER422_CRYCBY;
break; break;
@ -411,16 +411,16 @@ void fimc_set_yuv_order(struct fimc_ctx *ctx)
dbg("ctx->in_order_1p= %d", ctx->in_order_1p); dbg("ctx->in_order_1p= %d", ctx->in_order_1p);
switch (ctx->d_frame.fmt->color) { switch (ctx->d_frame.fmt->color) {
case S5P_FIMC_YCRYCB422: case FIMC_FMT_YCRYCB422:
ctx->out_order_1p = FIMC_REG_CIOCTRL_ORDER422_CBYCRY; ctx->out_order_1p = FIMC_REG_CIOCTRL_ORDER422_CBYCRY;
break; break;
case S5P_FIMC_CBYCRY422: case FIMC_FMT_CBYCRY422:
ctx->out_order_1p = FIMC_REG_CIOCTRL_ORDER422_YCRYCB; ctx->out_order_1p = FIMC_REG_CIOCTRL_ORDER422_YCRYCB;
break; break;
case S5P_FIMC_CRYCBY422: case FIMC_FMT_CRYCBY422:
ctx->out_order_1p = FIMC_REG_CIOCTRL_ORDER422_YCBYCR; ctx->out_order_1p = FIMC_REG_CIOCTRL_ORDER422_YCBYCR;
break; break;
case S5P_FIMC_YCBYCR422: case FIMC_FMT_YCBYCR422:
default: default:
ctx->out_order_1p = FIMC_REG_CIOCTRL_ORDER422_CRYCBY; ctx->out_order_1p = FIMC_REG_CIOCTRL_ORDER422_CRYCBY;
break; break;
@ -453,7 +453,7 @@ void fimc_prepare_dma_offset(struct fimc_ctx *ctx, struct fimc_frame *f)
f->dma_offset.cb_h >>= 1; f->dma_offset.cb_h >>= 1;
f->dma_offset.cr_h >>= 1; f->dma_offset.cr_h >>= 1;
} }
if (f->fmt->color == S5P_FIMC_YCBCR420) { if (f->fmt->color == FIMC_FMT_YCBCR420) {
f->dma_offset.cb_v >>= 1; f->dma_offset.cb_v >>= 1;
f->dma_offset.cr_v >>= 1; f->dma_offset.cr_v >>= 1;
} }

45
drivers/media/video/s5p-fimc/fimc-core.h
View file

@ -76,26 +76,31 @@ enum fimc_dev_flags {
#define fimc_capture_busy(dev) test_bit(ST_CAPT_BUSY, &(dev)->state) #define fimc_capture_busy(dev) test_bit(ST_CAPT_BUSY, &(dev)->state)
enum fimc_datapath { enum fimc_datapath {
FIMC_CAMERA, FIMC_IO_NONE,
FIMC_DMA, FIMC_IO_CAMERA,
FIMC_LCDFIFO, FIMC_IO_DMA,
FIMC_WRITEBACK FIMC_IO_LCDFIFO,
FIMC_IO_WRITEBACK,
FIMC_IO_ISP,
}; };
enum fimc_color_fmt { enum fimc_color_fmt {
S5P_FIMC_RGB444 = 0x10, FIMC_FMT_RGB444 = 0x10,
S5P_FIMC_RGB555, FIMC_FMT_RGB555,
S5P_FIMC_RGB565, FIMC_FMT_RGB565,
S5P_FIMC_RGB666, FIMC_FMT_RGB666,
S5P_FIMC_RGB888, FIMC_FMT_RGB888,
S5P_FIMC_RGB30_LOCAL, FIMC_FMT_RGB30_LOCAL,
S5P_FIMC_YCBCR420 = 0x20, FIMC_FMT_YCBCR420 = 0x20,
S5P_FIMC_YCBYCR422, FIMC_FMT_YCBYCR422,
S5P_FIMC_YCRYCB422, FIMC_FMT_YCRYCB422,
S5P_FIMC_CBYCRY422, FIMC_FMT_CBYCRY422,
S5P_FIMC_CRYCBY422, FIMC_FMT_CRYCBY422,
S5P_FIMC_YCBCR444_LOCAL, FIMC_FMT_YCBCR444_LOCAL,
S5P_FIMC_JPEG = 0x40, FIMC_FMT_JPEG = 0x40,
FIMC_FMT_RAW8 = 0x80,
FIMC_FMT_RAW10,
FIMC_FMT_RAW12,
}; };
#define fimc_fmt_is_rgb(x) (!!((x) & 0x10)) #define fimc_fmt_is_rgb(x) (!!((x) & 0x10))
@ -563,9 +568,9 @@ static inline int tiled_fmt(struct fimc_fmt *fmt)
static inline int fimc_get_alpha_mask(struct fimc_fmt *fmt) static inline int fimc_get_alpha_mask(struct fimc_fmt *fmt)
{ {
switch (fmt->color) { switch (fmt->color) {
case S5P_FIMC_RGB444: return 0x0f; case FIMC_FMT_RGB444: return 0x0f;
case S5P_FIMC_RGB555: return 0x01; case FIMC_FMT_RGB555: return 0x01;
case S5P_FIMC_RGB888: return 0xff; case FIMC_FMT_RGB888: return 0xff;
default: return 0; default: return 0;
}; };
} }

4
drivers/media/video/s5p-fimc/fimc-m2m.c
View file

@ -676,8 +676,8 @@ static int fimc_m2m_open(struct file *file)
/* Setup the device context for memory-to-memory mode */ /* Setup the device context for memory-to-memory mode */
ctx->state = FIMC_CTX_M2M; ctx->state = FIMC_CTX_M2M;
ctx->flags = 0; ctx->flags = 0;
ctx->in_path = FIMC_DMA; ctx->in_path = FIMC_IO_DMA;
ctx->out_path = FIMC_DMA; ctx->out_path = FIMC_IO_DMA;
ctx->m2m_ctx = v4l2_m2m_ctx_init(fimc->m2m.m2m_dev, ctx, queue_init); ctx->m2m_ctx = v4l2_m2m_ctx_init(fimc->m2m.m2m_dev, ctx, queue_init);
if (IS_ERR(ctx->m2m_ctx)) { if (IS_ERR(ctx->m2m_ctx)) {

48
drivers/media/video/s5p-fimc/fimc-reg.c
View file

@ -85,13 +85,13 @@ void fimc_hw_set_rotation(struct fimc_ctx *ctx)
* in direct fifo output mode. * in direct fifo output mode.
*/ */
if (ctx->rotation == 90 || ctx->rotation == 270) { if (ctx->rotation == 90 || ctx->rotation == 270) {
if (ctx->out_path == FIMC_LCDFIFO) if (ctx->out_path == FIMC_IO_LCDFIFO)
cfg |= FIMC_REG_CITRGFMT_INROT90; cfg |= FIMC_REG_CITRGFMT_INROT90;
else else
cfg |= FIMC_REG_CITRGFMT_OUTROT90; cfg |= FIMC_REG_CITRGFMT_OUTROT90;
} }
if (ctx->out_path == FIMC_DMA) { if (ctx->out_path == FIMC_IO_DMA) {
cfg |= fimc_hw_get_target_flip(ctx); cfg |= fimc_hw_get_target_flip(ctx);
writel(cfg, dev->regs + FIMC_REG_CITRGFMT); writel(cfg, dev->regs + FIMC_REG_CITRGFMT);
} else { } else {
@ -117,13 +117,13 @@ void fimc_hw_set_target_format(struct fimc_ctx *ctx)
FIMC_REG_CITRGFMT_VSIZE_MASK); FIMC_REG_CITRGFMT_VSIZE_MASK);
switch (frame->fmt->color) { switch (frame->fmt->color) {
case S5P_FIMC_RGB444...S5P_FIMC_RGB888: case FIMC_FMT_RGB444...FIMC_FMT_RGB888:
cfg |= FIMC_REG_CITRGFMT_RGB; cfg |= FIMC_REG_CITRGFMT_RGB;
break; break;
case S5P_FIMC_YCBCR420: case FIMC_FMT_YCBCR420:
cfg |= FIMC_REG_CITRGFMT_YCBCR420; cfg |= FIMC_REG_CITRGFMT_YCBCR420;
break; break;
case S5P_FIMC_YCBYCR422...S5P_FIMC_CRYCBY422: case FIMC_FMT_YCBYCR422...FIMC_FMT_CRYCBY422:
if (frame->fmt->colplanes == 1) if (frame->fmt->colplanes == 1)
cfg |= FIMC_REG_CITRGFMT_YCBCR422_1P; cfg |= FIMC_REG_CITRGFMT_YCBCR422_1P;
else else
@ -200,11 +200,11 @@ void fimc_hw_set_out_dma(struct fimc_ctx *ctx)
else if (fmt->colplanes == 3) else if (fmt->colplanes == 3)
cfg |= FIMC_REG_CIOCTRL_YCBCR_3PLANE; cfg |= FIMC_REG_CIOCTRL_YCBCR_3PLANE;
if (fmt->color == S5P_FIMC_RGB565) if (fmt->color == FIMC_FMT_RGB565)
cfg |= FIMC_REG_CIOCTRL_RGB565; cfg |= FIMC_REG_CIOCTRL_RGB565;
else if (fmt->color == S5P_FIMC_RGB555) else if (fmt->color == FIMC_FMT_RGB555)
cfg |= FIMC_REG_CIOCTRL_ARGB1555; cfg |= FIMC_REG_CIOCTRL_ARGB1555;
else if (fmt->color == S5P_FIMC_RGB444) else if (fmt->color == FIMC_FMT_RGB444)
cfg |= FIMC_REG_CIOCTRL_ARGB4444; cfg |= FIMC_REG_CIOCTRL_ARGB4444;
writel(cfg, dev->regs + FIMC_REG_CIOCTRL); writel(cfg, dev->regs + FIMC_REG_CIOCTRL);
@ -277,28 +277,28 @@ static void fimc_hw_set_scaler(struct fimc_ctx *ctx)
if (sc->copy_mode) if (sc->copy_mode)
cfg |= FIMC_REG_CISCCTRL_ONE2ONE; cfg |= FIMC_REG_CISCCTRL_ONE2ONE;
if (ctx->in_path == FIMC_DMA) { if (ctx->in_path == FIMC_IO_DMA) {
switch (src_frame->fmt->color) { switch (src_frame->fmt->color) {
case S5P_FIMC_RGB565: case FIMC_FMT_RGB565:
cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB565; cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB565;
break; break;
case S5P_FIMC_RGB666: case FIMC_FMT_RGB666:
cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB666; cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB666;
break; break;
case S5P_FIMC_RGB888: case FIMC_FMT_RGB888:
cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB888; cfg |= FIMC_REG_CISCCTRL_INRGB_FMT_RGB888;
break; break;
} }
} }
if (ctx->out_path == FIMC_DMA) { if (ctx->out_path == FIMC_IO_DMA) {
u32 color = dst_frame->fmt->color; u32 color = dst_frame->fmt->color;
if (color >= S5P_FIMC_RGB444 && color <= S5P_FIMC_RGB565) if (color >= FIMC_FMT_RGB444 && color <= FIMC_FMT_RGB565)
cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB565; cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB565;
else if (color == S5P_FIMC_RGB666) else if (color == FIMC_FMT_RGB666)
cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB666; cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB666;
else if (color == S5P_FIMC_RGB888) else if (color == FIMC_FMT_RGB888)
cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888; cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888;
} else { } else {
cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888; cfg |= FIMC_REG_CISCCTRL_OUTRGB_FMT_RGB888;
@ -351,7 +351,7 @@ void fimc_hw_en_capture(struct fimc_ctx *ctx)
u32 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT); u32 cfg = readl(dev->regs + FIMC_REG_CIIMGCPT);
if (ctx->out_path == FIMC_DMA) { if (ctx->out_path == FIMC_IO_DMA) {
/* one shot mode */ /* one shot mode */
cfg |= FIMC_REG_CIIMGCPT_CPT_FREN_ENABLE | cfg |= FIMC_REG_CIIMGCPT_CPT_FREN_ENABLE |
FIMC_REG_CIIMGCPT_IMGCPTEN; FIMC_REG_CIIMGCPT_IMGCPTEN;
@ -408,7 +408,7 @@ static void fimc_hw_set_in_dma_size(struct fimc_ctx *ctx)
u32 cfg_o = 0; u32 cfg_o = 0;
u32 cfg_r = 0; u32 cfg_r = 0;
if (FIMC_LCDFIFO == ctx->out_path) if (FIMC_IO_LCDFIFO == ctx->out_path)
cfg_r |= FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN; cfg_r |= FIMC_REG_CIREAL_ISIZE_AUTOLOAD_EN;
cfg_o |= (frame->f_height << 16) | frame->f_width; cfg_o |= (frame->f_height << 16) | frame->f_width;
@ -439,7 +439,7 @@ void fimc_hw_set_in_dma(struct fimc_ctx *ctx)
fimc_hw_set_in_dma_size(ctx); fimc_hw_set_in_dma_size(ctx);
/* Use DMA autoload only in FIFO mode. */ /* Use DMA autoload only in FIFO mode. */
fimc_hw_en_autoload(dev, ctx->out_path == FIMC_LCDFIFO); fimc_hw_en_autoload(dev, ctx->out_path == FIMC_IO_LCDFIFO);
/* Set the input DMA to process single frame only. */ /* Set the input DMA to process single frame only. */
cfg = readl(dev->regs + FIMC_REG_MSCTRL); cfg = readl(dev->regs + FIMC_REG_MSCTRL);
@ -454,10 +454,10 @@ void fimc_hw_set_in_dma(struct fimc_ctx *ctx)
| FIMC_REG_MSCTRL_FIFO_CTRL_FULL); | FIMC_REG_MSCTRL_FIFO_CTRL_FULL);
switch (frame->fmt->color) { switch (frame->fmt->color) {
case S5P_FIMC_RGB565...S5P_FIMC_RGB888: case FIMC_FMT_RGB565...FIMC_FMT_RGB888:
cfg |= FIMC_REG_MSCTRL_INFORMAT_RGB; cfg |= FIMC_REG_MSCTRL_INFORMAT_RGB;
break; break;
case S5P_FIMC_YCBCR420: case FIMC_FMT_YCBCR420:
cfg |= FIMC_REG_MSCTRL_INFORMAT_YCBCR420; cfg |= FIMC_REG_MSCTRL_INFORMAT_YCBCR420;
if (frame->fmt->colplanes == 2) if (frame->fmt->colplanes == 2)
@ -466,7 +466,7 @@ void fimc_hw_set_in_dma(struct fimc_ctx *ctx)
cfg |= FIMC_REG_MSCTRL_C_INT_IN_3PLANE; cfg |= FIMC_REG_MSCTRL_C_INT_IN_3PLANE;
break; break;
case S5P_FIMC_YCBYCR422...S5P_FIMC_CRYCBY422: case FIMC_FMT_YCBYCR422...FIMC_FMT_CRYCBY422:
if (frame->fmt->colplanes == 1) { if (frame->fmt->colplanes == 1) {
cfg |= ctx->in_order_1p cfg |= ctx->in_order_1p
| FIMC_REG_MSCTRL_INFORMAT_YCBCR422_1P; | FIMC_REG_MSCTRL_INFORMAT_YCBCR422_1P;
@ -507,7 +507,7 @@ void fimc_hw_set_input_path(struct fimc_ctx *ctx)
u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL); u32 cfg = readl(dev->regs + FIMC_REG_MSCTRL);
cfg &= ~FIMC_REG_MSCTRL_INPUT_MASK; cfg &= ~FIMC_REG_MSCTRL_INPUT_MASK;
if (ctx->in_path == FIMC_DMA) if (ctx->in_path == FIMC_IO_DMA)
cfg |= FIMC_REG_MSCTRL_INPUT_MEMORY; cfg |= FIMC_REG_MSCTRL_INPUT_MEMORY;
else else
cfg |= FIMC_REG_MSCTRL_INPUT_EXTCAM; cfg |= FIMC_REG_MSCTRL_INPUT_EXTCAM;
@ -521,7 +521,7 @@ void fimc_hw_set_output_path(struct fimc_ctx *ctx)
u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL); u32 cfg = readl(dev->regs + FIMC_REG_CISCCTRL);
cfg &= ~FIMC_REG_CISCCTRL_LCDPATHEN_FIFO; cfg &= ~FIMC_REG_CISCCTRL_LCDPATHEN_FIFO;
if (ctx->out_path == FIMC_LCDFIFO) if (ctx->out_path == FIMC_IO_LCDFIFO)
cfg |= FIMC_REG_CISCCTRL_LCDPATHEN_FIFO; cfg |= FIMC_REG_CISCCTRL_LCDPATHEN_FIFO;
writel(cfg, dev->regs + FIMC_REG_CISCCTRL); writel(cfg, dev->regs + FIMC_REG_CISCCTRL);
} }