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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-06 10:57:46 +00:00
sh-pfc: Expose real groups and functions in pinctrl/pinmux operations
The sh-pfc driver exposes one fake group and function per GPIO pin. As the pinctrl and pinmux APIs are not used by any SuperH and SH Mobile board or driver, drop the fake groups and functions and replace them by a real pinctrl and pinmux implementation. Groups and functions must now be explicitly provided by PFC SoC-specific data. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
6d170aa011
commit
3d8d9f1df9
2 changed files with 93 additions and 56 deletions
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@ -31,18 +31,14 @@ struct sh_pfc_pinctrl {
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struct sh_pfc *pfc;
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struct pinmux_func **functions;
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unsigned int nr_functions;
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struct pinctrl_pin_desc *pads;
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unsigned int nr_pads;
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struct pinctrl_pin_desc *pins;
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};
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static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->nr_pads;
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return pmx->pfc->info->nr_groups;
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}
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static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
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@ -50,16 +46,16 @@ static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->pads[selector].name;
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return pmx->pfc->info->groups[selector].name;
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}
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static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
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static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
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const unsigned **pins, unsigned *num_pins)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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*pins = &pmx->pads[group].number;
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*num_pins = 1;
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*pins = pmx->pfc->info->groups[selector].pins;
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*num_pins = pmx->pfc->info->groups[selector].nr_pins;
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return 0;
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}
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@ -81,7 +77,7 @@ static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->nr_functions;
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return pmx->pfc->info->nr_functions;
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}
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static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
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@ -89,30 +85,67 @@ static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->functions[selector]->name;
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return pmx->pfc->info->functions[selector].name;
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}
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static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
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static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev,
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unsigned selector,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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*groups = &pmx->functions[func]->name;
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*num_groups = 1;
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*groups = pmx->pfc->info->functions[selector].groups;
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*num_groups = pmx->pfc->info->functions[selector].nr_groups;
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return 0;
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}
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static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
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static int sh_pfc_func_enable(struct pinctrl_dev *pctldev, unsigned selector,
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unsigned group)
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{
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return 0;
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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struct sh_pfc *pfc = pmx->pfc;
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const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
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unsigned long flags;
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unsigned int i;
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int ret = -EINVAL;
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spin_lock_irqsave(&pfc->lock, flags);
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for (i = 0; i < grp->nr_pins; ++i) {
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if (sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION,
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GPIO_CFG_DRYRUN))
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goto done;
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if (sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION,
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GPIO_CFG_REQ))
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goto done;
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}
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ret = 0;
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done:
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spin_unlock_irqrestore(&pfc->lock, flags);
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return ret;
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}
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static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
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static void sh_pfc_func_disable(struct pinctrl_dev *pctldev, unsigned selector,
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unsigned group)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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struct sh_pfc *pfc = pmx->pfc;
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const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
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unsigned long flags;
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unsigned int i;
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spin_lock_irqsave(&pfc->lock, flags);
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for (i = 0; i < grp->nr_pins; ++i)
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sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION,
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GPIO_CFG_FREE);
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spin_unlock_irqrestore(&pfc->lock, flags);
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}
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static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
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@ -234,8 +267,8 @@ static const struct pinmux_ops sh_pfc_pinmux_ops = {
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.get_functions_count = sh_pfc_get_functions_count,
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.get_function_name = sh_pfc_get_function_name,
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.get_function_groups = sh_pfc_get_function_groups,
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.enable = sh_pfc_noop_enable,
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.disable = sh_pfc_noop_disable,
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.enable = sh_pfc_func_enable,
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.disable = sh_pfc_func_disable,
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.gpio_request_enable = sh_pfc_gpio_request_enable,
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.gpio_disable_free = sh_pfc_gpio_disable_free,
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.gpio_set_direction = sh_pfc_gpio_set_direction,
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@ -312,10 +345,10 @@ static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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nr_ranges = pfc->info->nr_ranges;
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}
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pmx->pads = devm_kzalloc(pfc->dev,
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sizeof(*pmx->pads) * pfc->info->nr_pins,
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pmx->pins = devm_kzalloc(pfc->dev,
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sizeof(*pmx->pins) * pfc->info->nr_pins,
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GFP_KERNEL);
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if (unlikely(!pmx->pads))
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if (unlikely(!pmx->pins))
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return -ENOMEM;
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for (i = 0, nr_pins = 0; i < nr_ranges; ++i) {
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@ -324,7 +357,7 @@ static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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for (number = range->begin; number <= range->end;
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number++, nr_pins++) {
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struct pinctrl_pin_desc *pin = &pmx->pads[nr_pins];
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struct pinctrl_pin_desc *pin = &pmx->pins[nr_pins];
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struct sh_pfc_pin *info = &pfc->info->pins[nr_pins];
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pin->number = number;
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@ -337,37 +370,10 @@ static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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return nr_ranges;
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}
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static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
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{
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int i, fn;
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for (i = 0; i < pfc->info->nr_func_gpios; i++) {
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struct pinmux_func *func = pfc->info->func_gpios + i;
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if (func->enum_id)
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pmx->nr_functions++;
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}
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pmx->functions = devm_kzalloc(pfc->dev, pmx->nr_functions *
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sizeof(*pmx->functions), GFP_KERNEL);
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if (unlikely(!pmx->functions))
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return -ENOMEM;
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for (i = fn = 0; i < pfc->info->nr_func_gpios; i++) {
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struct pinmux_func *func = pfc->info->func_gpios + i;
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if (func->enum_id)
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pmx->functions[fn++] = func;
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}
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return 0;
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}
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int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
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{
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struct sh_pfc_pinctrl *pmx;
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int nr_ranges;
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int ret;
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pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
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if (unlikely(!pmx))
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@ -380,16 +386,12 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
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if (unlikely(nr_ranges < 0))
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return nr_ranges;
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ret = sh_pfc_map_functions(pfc, pmx);
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if (unlikely(ret != 0))
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return ret;
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pmx->pctl_desc.name = DRV_NAME;
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pmx->pctl_desc.owner = THIS_MODULE;
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pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
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pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
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pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
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pmx->pctl_desc.pins = pmx->pads;
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pmx->pctl_desc.pins = pmx->pins;
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pmx->pctl_desc.npins = pfc->info->nr_pins;
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pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);
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@ -16,6 +16,8 @@
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typedef unsigned short pinmux_enum_t;
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#define SH_PFC_MARK_INVALID ((pinmux_enum_t)-1)
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enum {
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PINMUX_TYPE_NONE,
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@ -40,6 +42,34 @@ struct sh_pfc_pin {
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const char *name;
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};
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#define SH_PFC_PIN_GROUP(n) \
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{ \
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.name = #n, \
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.pins = n##_pins, \
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.mux = n##_mux, \
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.nr_pins = ARRAY_SIZE(n##_pins), \
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}
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struct sh_pfc_pin_group {
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const char *name;
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const unsigned int *pins;
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const unsigned int *mux;
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unsigned int nr_pins;
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};
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#define SH_PFC_FUNCTION(n) \
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{ \
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.name = #n, \
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.groups = n##_groups, \
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.nr_groups = ARRAY_SIZE(n##_groups), \
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}
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struct sh_pfc_function {
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const char *name;
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const char * const *groups;
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unsigned int nr_groups;
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};
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struct pinmux_func {
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const pinmux_enum_t enum_id;
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const char *name;
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@ -113,6 +143,11 @@ struct sh_pfc_soc_info {
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unsigned int nr_pins;
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const struct pinmux_range *ranges;
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unsigned int nr_ranges;
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const struct sh_pfc_pin_group *groups;
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unsigned int nr_groups;
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const struct sh_pfc_function *functions;
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unsigned int nr_functions;
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struct pinmux_func *func_gpios;
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unsigned int nr_func_gpios;
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