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ARM: socfpga: dts: Add ethernet bindings for SOCFPGA
Add entry for 2nd GMAC controller. Add the correct clocks for the GMAC. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> CC: Arnd Bergmann <arnd@arndb.de> CC: Olof Johansson <olof@lixom.net> Cc: Pavel Machek <pavel@denx.de> CC: <linux@arm.linux.org.uk> v2: - Moved "disabled" status to dtsi file Signed-off-by: Olof Johansson <olof@lixom.net>
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6cd26ecedf
commit
3d954cf151
3 changed files with 34 additions and 2 deletions
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@ -23,6 +23,7 @@ / {
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aliases {
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aliases {
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ethernet0 = &gmac0;
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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serial0 = &uart0;
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serial0 = &uart0;
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serial1 = &uart1;
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serial1 = &uart1;
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timer0 = &timer0;
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timer0 = &timer0;
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@ -238,13 +239,26 @@ s2f_usr2_clk: s2f_usr2_clk {
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};
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};
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};
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};
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gmac0: stmmac@ff700000 {
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gmac0: ethernet@ff700000 {
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compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
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compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
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reg = <0xff700000 0x2000>;
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reg = <0xff700000 0x2000>;
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interrupts = <0 115 4>;
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interrupts = <0 115 4>;
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interrupt-names = "macirq";
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
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mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
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phy-mode = "gmii";
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clocks = <&emac0_clk>;
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clock-names = "stmmaceth";
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status = "disabled";
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};
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gmac1: ethernet@ff702000 {
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compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
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reg = <0xff702000 0x2000>;
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interrupts = <0 120 4>;
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interrupt-names = "macirq";
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mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
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clocks = <&emac1_clk>;
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clock-names = "stmmaceth";
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status = "disabled";
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};
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};
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L2: l2-cache@fffef000 {
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L2: l2-cache@fffef000 {
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@ -32,6 +32,13 @@ memory {
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reg = <0x0 0x40000000>; /* 1GB */
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reg = <0x0 0x40000000>; /* 1GB */
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};
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};
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aliases {
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/* this allow the ethaddr uboot environmnet variable contents
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* to be added to the gmac1 device tree blob.
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*/
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ethernet0 = &gmac1;
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};
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soc {
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soc {
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clkmgr@ffd04000 {
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clkmgr@ffd04000 {
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clocks {
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clocks {
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@ -41,6 +48,12 @@ osc1 {
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};
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};
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};
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};
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ethernet@ff702000 {
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phy-mode = "rgmii";
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phy-addr = <0xffffffff>; /* probe for phy addr */
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status = "okay";
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};
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timer0@ffc08000 {
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timer0@ffc08000 {
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clock-frequency = <100000000>;
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clock-frequency = <100000000>;
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};
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};
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@ -41,6 +41,11 @@ osc1 {
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};
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};
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};
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};
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ethernet@ff700000 {
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phy-mode = "gmii";
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status = "okay";
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};
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timer0@ffc08000 {
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timer0@ffc08000 {
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clock-frequency = <7000000>;
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clock-frequency = <7000000>;
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};
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};
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