mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 19:00:25 +00:00
Qualcomm ARM Based Driver Updates for v5.4
* Add AOSS QMP support * Various fixups for Qualcomm SCM * Add socinfo driver * Add SoC serial number attribute and associated APIs * Add SM8150 and SC7180 support in Qualcomm SCM * Fixup max processor count in SMEM -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJdZpm4AAoJEFKiBbHx2RXV6UEP/1S0B3yKF+/HBylghMBgYI21 P0qWH0cGSYioCLYEPn1qZjftBGSg9K3e31IoFk/mSDy0rt4wbg53ribkL6tE7M+c ZLZfOs06stGLg6Nf/oLz2SbN2bQsIZBGJoVgp58N/z4Qymspvf7Vg4y9VCy/dzqe R5bQZhYNWJNzv2q2vju06ACCkQgkRVfIuQSI+69t3bbeWJrHatVrPRHP8Xi8kaTh /nI7hkO9ouMC6Uda8/aeGoo5V/xaC+rankp9ttdFeHNVXMgk6c3v5rD4fSYw+CVY Icw7MCKGF1QPjHkLofTZsqpADHabUwu/NmDV1D5c1A/qu0gBocPSI1o1XbChlceS E/3oO9DJQoNxJOKPxMzZwtVRAeGGrk7/PflkBY+/55XNXO4zasD0Kbi3/ReUokBJ G5zyN/Lm/gsSfsyiJBFMN02mxbKixlSd/XDp/gClLf7f1QXV+IFyeiDkyMxWH00b gM4c8hJalWJ2jKi9JDA7GVJD9N+8Q76+Z4HmGiyJJZXtLrVB+ehQFrSOxt97qvBE 4KeZUTfSON++8LpWeP3zVSB1Kox6+cCGQEK0VmwhEHOjE4gg8iV/YIKznwx7clTn XepzT4K49xO5NQ9h9g2rXNdzvuXvVrKA/CuCtv6/24aSifHHpFroCIewcKZa++/m Pv3LzPbX4a8d5Hq/qP0o =MsUS -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.4 * Add AOSS QMP support * Various fixups for Qualcomm SCM * Add socinfo driver * Add SoC serial number attribute and associated APIs * Add SM8150 and SC7180 support in Qualcomm SCM * Fixup max processor count in SMEM * tag 'qcom-drivers-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: aoss: Add AOSS QMP support dt-bindings: soc: qcom: aoss: Add SM8150 and SC7180 support dt-bindings: firmware: scm: Add SM8150 and SC7180 support dt-bindings: firmware: scm: re-order compatible list soc: qcom: smem: Update max processor count soc: qcom: socinfo: Annotate switch cases with fall through soc: qcom: Extend AOSS QMP driver to support resources that are used to wake up the SoC. soc: qcom: socinfo: Expose image information soc: qcom: socinfo: Expose custom attributes soc: qcom: Add socinfo driver base: soc: Export soc_device_register/unregister APIs base: soc: Add serial_number attribute to soc firmware: qcom_scm: Cleanup code in qcom_scm_assign_mem() firmware: qcom_scm: Fix some typos in docs and printks firmware: qcom_scm: Use proper types for dma mappings
This commit is contained in:
Arnd Bergmann
commit
3dc8dcb02f
12 changed files with 681 additions and 30 deletions
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@ -26,6 +26,13 @@ Description:
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Read-only attribute common to all SoCs. Contains SoC family name
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(e.g. DB8500).
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What: /sys/devices/socX/serial_number
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Date: January 2019
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contact: Bjorn Andersson <bjorn.andersson@linaro.org>
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Description:
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Read-only attribute supported by most SoCs. Contains the SoC's
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serial number, if available.
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What: /sys/devices/socX/soc_id
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Date: January 2012
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contact: Lee Jones <lee.jones@linaro.org>
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@ -9,14 +9,16 @@ Required properties:
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- compatible: must contain one of the following:
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* "qcom,scm-apq8064"
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* "qcom,scm-apq8084"
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* "qcom,scm-ipq4019"
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* "qcom,scm-msm8660"
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* "qcom,scm-msm8916"
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* "qcom,scm-msm8960"
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* "qcom,scm-msm8974"
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* "qcom,scm-msm8996"
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* "qcom,scm-msm8998"
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* "qcom,scm-ipq4019"
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* "qcom,scm-sc7180"
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* "qcom,scm-sdm845"
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* "qcom,scm-sm8150"
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and:
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* "qcom,scm"
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- clocks: Specifies clocks needed by the SCM interface, if any:
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@ -15,7 +15,10 @@ power-domains.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be "qcom,sdm845-aoss-qmp"
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Definition: must be one of:
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"qcom,sc7180-aoss-qmp"
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"qcom,sdm845-aoss-qmp"
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"qcom,sm8150-aoss-qmp"
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- reg:
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Usage: required
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@ -33,6 +33,7 @@ static struct bus_type soc_bus_type = {
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static DEVICE_ATTR(machine, S_IRUGO, soc_info_get, NULL);
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static DEVICE_ATTR(family, S_IRUGO, soc_info_get, NULL);
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static DEVICE_ATTR(serial_number, S_IRUGO, soc_info_get, NULL);
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static DEVICE_ATTR(soc_id, S_IRUGO, soc_info_get, NULL);
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static DEVICE_ATTR(revision, S_IRUGO, soc_info_get, NULL);
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@ -57,6 +58,9 @@ static umode_t soc_attribute_mode(struct kobject *kobj,
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if ((attr == &dev_attr_revision.attr)
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&& (soc_dev->attr->revision != NULL))
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return attr->mode;
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if ((attr == &dev_attr_serial_number.attr)
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&& (soc_dev->attr->serial_number != NULL))
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return attr->mode;
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if ((attr == &dev_attr_soc_id.attr)
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&& (soc_dev->attr->soc_id != NULL))
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return attr->mode;
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@ -77,6 +81,8 @@ static ssize_t soc_info_get(struct device *dev,
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return sprintf(buf, "%s\n", soc_dev->attr->family);
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if (attr == &dev_attr_revision)
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return sprintf(buf, "%s\n", soc_dev->attr->revision);
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if (attr == &dev_attr_serial_number)
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return sprintf(buf, "%s\n", soc_dev->attr->serial_number);
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if (attr == &dev_attr_soc_id)
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return sprintf(buf, "%s\n", soc_dev->attr->soc_id);
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@ -87,6 +93,7 @@ static ssize_t soc_info_get(struct device *dev,
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static struct attribute *soc_attr[] = {
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&dev_attr_machine.attr,
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&dev_attr_family.attr,
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&dev_attr_serial_number.attr,
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&dev_attr_soc_id.attr,
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&dev_attr_revision.attr,
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NULL,
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@ -157,6 +164,7 @@ struct soc_device *soc_device_register(struct soc_device_attribute *soc_dev_attr
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out1:
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return ERR_PTR(ret);
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}
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EXPORT_SYMBOL_GPL(soc_device_register);
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/* Ensure soc_dev->attr is freed prior to calling soc_device_unregister. */
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void soc_device_unregister(struct soc_device *soc_dev)
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@ -166,6 +174,7 @@ void soc_device_unregister(struct soc_device *soc_dev)
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device_unregister(&soc_dev->dev);
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early_soc_dev_attr = NULL;
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}
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EXPORT_SYMBOL_GPL(soc_device_unregister);
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static int __init soc_bus_register(void)
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{
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@ -9,6 +9,7 @@
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#include <linux/init.h>
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#include <linux/cpumask.h>
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#include <linux/export.h>
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#include <linux/dma-direct.h>
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#include <linux/dma-mapping.h>
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#include <linux/module.h>
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#include <linux/types.h>
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@ -425,21 +426,23 @@ EXPORT_SYMBOL(qcom_scm_set_remote_state);
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* @mem_sz: size of the region.
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* @srcvm: vmid for current set of owners, each set bit in
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* flag indicate a unique owner
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* @newvm: array having new owners and corrsponding permission
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* @newvm: array having new owners and corresponding permission
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* flags
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* @dest_cnt: number of owners in next set.
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*
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* Return negative errno on failure, 0 on success, with @srcvm updated.
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* Return negative errno on failure or 0 on success with @srcvm updated.
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*/
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int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
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unsigned int *srcvm,
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struct qcom_scm_vmperm *newvm, int dest_cnt)
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const struct qcom_scm_vmperm *newvm,
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unsigned int dest_cnt)
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{
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struct qcom_scm_current_perm_info *destvm;
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struct qcom_scm_mem_map_info *mem_to_map;
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phys_addr_t mem_to_map_phys;
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phys_addr_t dest_phys;
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phys_addr_t ptr_phys;
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dma_addr_t ptr_dma;
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size_t mem_to_map_sz;
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size_t dest_sz;
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size_t src_sz;
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@ -447,52 +450,50 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
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int next_vm;
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__le32 *src;
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void *ptr;
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int ret;
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int len;
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int i;
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int ret, i, b;
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unsigned long srcvm_bits = *srcvm;
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src_sz = hweight_long(*srcvm) * sizeof(*src);
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src_sz = hweight_long(srcvm_bits) * sizeof(*src);
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mem_to_map_sz = sizeof(*mem_to_map);
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dest_sz = dest_cnt * sizeof(*destvm);
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ptr_sz = ALIGN(src_sz, SZ_64) + ALIGN(mem_to_map_sz, SZ_64) +
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ALIGN(dest_sz, SZ_64);
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ptr = dma_alloc_coherent(__scm->dev, ptr_sz, &ptr_phys, GFP_KERNEL);
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ptr = dma_alloc_coherent(__scm->dev, ptr_sz, &ptr_dma, GFP_KERNEL);
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if (!ptr)
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return -ENOMEM;
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ptr_phys = dma_to_phys(__scm->dev, ptr_dma);
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/* Fill source vmid detail */
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src = ptr;
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len = hweight_long(*srcvm);
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for (i = 0; i < len; i++) {
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src[i] = cpu_to_le32(ffs(*srcvm) - 1);
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*srcvm ^= 1 << (ffs(*srcvm) - 1);
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}
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i = 0;
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for_each_set_bit(b, &srcvm_bits, BITS_PER_LONG)
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src[i++] = cpu_to_le32(b);
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/* Fill details of mem buff to map */
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mem_to_map = ptr + ALIGN(src_sz, SZ_64);
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mem_to_map_phys = ptr_phys + ALIGN(src_sz, SZ_64);
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mem_to_map[0].mem_addr = cpu_to_le64(mem_addr);
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mem_to_map[0].mem_size = cpu_to_le64(mem_sz);
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mem_to_map->mem_addr = cpu_to_le64(mem_addr);
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mem_to_map->mem_size = cpu_to_le64(mem_sz);
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next_vm = 0;
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/* Fill details of next vmid detail */
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destvm = ptr + ALIGN(mem_to_map_sz, SZ_64) + ALIGN(src_sz, SZ_64);
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dest_phys = ptr_phys + ALIGN(mem_to_map_sz, SZ_64) + ALIGN(src_sz, SZ_64);
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for (i = 0; i < dest_cnt; i++) {
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destvm[i].vmid = cpu_to_le32(newvm[i].vmid);
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destvm[i].perm = cpu_to_le32(newvm[i].perm);
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destvm[i].ctx = 0;
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destvm[i].ctx_size = 0;
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next_vm |= BIT(newvm[i].vmid);
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for (i = 0; i < dest_cnt; i++, destvm++, newvm++) {
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destvm->vmid = cpu_to_le32(newvm->vmid);
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destvm->perm = cpu_to_le32(newvm->perm);
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destvm->ctx = 0;
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destvm->ctx_size = 0;
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next_vm |= BIT(newvm->vmid);
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}
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ret = __qcom_scm_assign_mem(__scm->dev, mem_to_map_phys, mem_to_map_sz,
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ptr_phys, src_sz, dest_phys, dest_sz);
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dma_free_coherent(__scm->dev, ALIGN(ptr_sz, SZ_64), ptr, ptr_phys);
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dma_free_coherent(__scm->dev, ptr_sz, ptr, ptr_dma);
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if (ret) {
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dev_err(__scm->dev,
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"Assign memory protection call failed %d.\n", ret);
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"Assign memory protection call failed %d\n", ret);
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return -EINVAL;
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}
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@ -175,6 +175,14 @@ config QCOM_SMSM
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Say yes here to support the Qualcomm Shared Memory State Machine.
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The state machine is represented by bits in shared memory.
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config QCOM_SOCINFO
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tristate "Qualcomm socinfo driver"
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depends on QCOM_SMEM
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select SOC_BUS
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help
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Say yes here to support the Qualcomm socinfo driver, providing
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information about the SoC to user space.
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config QCOM_WCNSS_CTRL
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tristate "Qualcomm WCNSS control driver"
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depends on ARCH_QCOM || COMPILE_TEST
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@ -18,6 +18,7 @@ obj-$(CONFIG_QCOM_SMEM) += smem.o
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obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o
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obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
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obj-$(CONFIG_QCOM_SMSM) += smsm.o
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obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
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obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
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obj-$(CONFIG_QCOM_APR) += apr.o
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obj-$(CONFIG_QCOM_LLCC) += llcc-slice.o
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@ -10,6 +10,8 @@
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/thermal.h>
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#include <linux/slab.h>
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#define QMP_DESC_MAGIC 0x0
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#define QMP_DESC_VERSION 0x4
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@ -40,6 +42,17 @@
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/* 64 bytes is enough to store the requests and provides padding to 4 bytes */
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#define QMP_MSG_LEN 64
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#define QMP_NUM_COOLING_RESOURCES 2
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static bool qmp_cdev_init_state = 1;
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struct qmp_cooling_device {
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struct thermal_cooling_device *cdev;
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struct qmp *qmp;
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char *name;
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bool state;
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};
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/**
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* struct qmp - driver state for QMP implementation
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* @msgram: iomem referencing the message RAM used for communication
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@ -69,6 +82,7 @@ struct qmp {
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struct clk_hw qdss_clk;
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struct genpd_onecell_data pd_data;
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struct qmp_cooling_device *cooling_devs;
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};
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struct qmp_pd {
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@ -385,6 +399,118 @@ static void qmp_pd_remove(struct qmp *qmp)
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pm_genpd_remove(data->domains[i]);
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}
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static int qmp_cdev_get_max_state(struct thermal_cooling_device *cdev,
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unsigned long *state)
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{
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*state = qmp_cdev_init_state;
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return 0;
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}
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static int qmp_cdev_get_cur_state(struct thermal_cooling_device *cdev,
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unsigned long *state)
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{
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struct qmp_cooling_device *qmp_cdev = cdev->devdata;
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*state = qmp_cdev->state;
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return 0;
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}
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static int qmp_cdev_set_cur_state(struct thermal_cooling_device *cdev,
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unsigned long state)
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{
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struct qmp_cooling_device *qmp_cdev = cdev->devdata;
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char buf[QMP_MSG_LEN] = {};
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bool cdev_state;
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int ret;
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/* Normalize state */
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cdev_state = !!state;
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if (qmp_cdev->state == state)
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return 0;
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snprintf(buf, sizeof(buf),
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"{class: volt_flr, event:zero_temp, res:%s, value:%s}",
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qmp_cdev->name,
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cdev_state ? "off" : "on");
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ret = qmp_send(qmp_cdev->qmp, buf, sizeof(buf));
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|
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if (!ret)
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qmp_cdev->state = cdev_state;
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return ret;
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}
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|
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static struct thermal_cooling_device_ops qmp_cooling_device_ops = {
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.get_max_state = qmp_cdev_get_max_state,
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.get_cur_state = qmp_cdev_get_cur_state,
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.set_cur_state = qmp_cdev_set_cur_state,
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};
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static int qmp_cooling_device_add(struct qmp *qmp,
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struct qmp_cooling_device *qmp_cdev,
|
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struct device_node *node)
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{
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char *cdev_name = (char *)node->name;
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qmp_cdev->qmp = qmp;
|
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qmp_cdev->state = qmp_cdev_init_state;
|
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qmp_cdev->name = cdev_name;
|
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qmp_cdev->cdev = devm_thermal_of_cooling_device_register
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(qmp->dev, node,
|
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cdev_name,
|
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qmp_cdev, &qmp_cooling_device_ops);
|
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|
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if (IS_ERR(qmp_cdev->cdev))
|
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dev_err(qmp->dev, "unable to register %s cooling device\n",
|
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cdev_name);
|
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|
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return PTR_ERR_OR_ZERO(qmp_cdev->cdev);
|
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}
|
||||
|
||||
static int qmp_cooling_devices_register(struct qmp *qmp)
|
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{
|
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struct device_node *np, *child;
|
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int count = QMP_NUM_COOLING_RESOURCES;
|
||||
int ret;
|
||||
|
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np = qmp->dev->of_node;
|
||||
|
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qmp->cooling_devs = devm_kcalloc(qmp->dev, count,
|
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sizeof(*qmp->cooling_devs),
|
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GFP_KERNEL);
|
||||
|
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if (!qmp->cooling_devs)
|
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return -ENOMEM;
|
||||
|
||||
for_each_available_child_of_node(np, child) {
|
||||
if (!of_find_property(child, "#cooling-cells", NULL))
|
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continue;
|
||||
ret = qmp_cooling_device_add(qmp, &qmp->cooling_devs[count++],
|
||||
child);
|
||||
if (ret)
|
||||
goto unroll;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
unroll:
|
||||
while (--count >= 0)
|
||||
thermal_cooling_device_unregister
|
||||
(qmp->cooling_devs[count].cdev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void qmp_cooling_devices_remove(struct qmp *qmp)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < QMP_NUM_COOLING_RESOURCES; i++)
|
||||
thermal_cooling_device_unregister(qmp->cooling_devs[i].cdev);
|
||||
}
|
||||
|
||||
static int qmp_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res;
|
||||
|
|
@ -433,6 +559,10 @@ static int qmp_probe(struct platform_device *pdev)
|
|||
if (ret)
|
||||
goto err_remove_qdss_clk;
|
||||
|
||||
ret = qmp_cooling_devices_register(qmp);
|
||||
if (ret)
|
||||
dev_err(&pdev->dev, "failed to register aoss cooling devices\n");
|
||||
|
||||
platform_set_drvdata(pdev, qmp);
|
||||
|
||||
return 0;
|
||||
|
|
@ -453,6 +583,7 @@ static int qmp_remove(struct platform_device *pdev)
|
|||
|
||||
qmp_qdss_clk_remove(qmp);
|
||||
qmp_pd_remove(qmp);
|
||||
qmp_cooling_devices_remove(qmp);
|
||||
|
||||
qmp_close(qmp);
|
||||
mbox_free_channel(qmp->mbox_chan);
|
||||
|
|
@ -461,7 +592,9 @@ static int qmp_remove(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
static const struct of_device_id qmp_dt_match[] = {
|
||||
{ .compatible = "qcom,sc7180-aoss-qmp", },
|
||||
{ .compatible = "qcom,sdm845-aoss-qmp", },
|
||||
{ .compatible = "qcom,sm8150-aoss-qmp", },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, qmp_dt_match);
|
||||
|
|
|
|||
|
|
@ -84,7 +84,7 @@
|
|||
#define SMEM_GLOBAL_HOST 0xfffe
|
||||
|
||||
/* Max number of processors/hosts in a system */
|
||||
#define SMEM_HOST_COUNT 10
|
||||
#define SMEM_HOST_COUNT 11
|
||||
|
||||
/**
|
||||
* struct smem_proc_comm - proc_comm communication struct (legacy)
|
||||
|
|
@ -268,6 +268,7 @@ struct qcom_smem {
|
|||
struct smem_partition_header *partitions[SMEM_HOST_COUNT];
|
||||
size_t cacheline[SMEM_HOST_COUNT];
|
||||
u32 item_count;
|
||||
struct platform_device *socinfo;
|
||||
|
||||
unsigned num_regions;
|
||||
struct smem_region regions[];
|
||||
|
|
@ -963,11 +964,19 @@ static int qcom_smem_probe(struct platform_device *pdev)
|
|||
|
||||
__smem = smem;
|
||||
|
||||
smem->socinfo = platform_device_register_data(&pdev->dev, "qcom-socinfo",
|
||||
PLATFORM_DEVID_NONE, NULL,
|
||||
0);
|
||||
if (IS_ERR(smem->socinfo))
|
||||
dev_dbg(&pdev->dev, "failed to register socinfo device\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qcom_smem_remove(struct platform_device *pdev)
|
||||
{
|
||||
platform_device_unregister(__smem->socinfo);
|
||||
|
||||
hwspin_lock_free(__smem->hwlock);
|
||||
__smem = NULL;
|
||||
|
||||
|
|
|
|||
476
drivers/soc/qcom/socinfo.c
Normal file
476
drivers/soc/qcom/socinfo.c
Normal file
|
|
@ -0,0 +1,476 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2017-2019, Linaro Ltd.
|
||||
*/
|
||||
|
||||
#include <linux/debugfs.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/random.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/soc/qcom/smem.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/sys_soc.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
/*
|
||||
* SoC version type with major number in the upper 16 bits and minor
|
||||
* number in the lower 16 bits.
|
||||
*/
|
||||
#define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
|
||||
#define SOCINFO_MINOR(ver) ((ver) & 0xffff)
|
||||
#define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff))
|
||||
|
||||
#define SMEM_SOCINFO_BUILD_ID_LENGTH 32
|
||||
|
||||
/*
|
||||
* SMEM item id, used to acquire handles to respective
|
||||
* SMEM region.
|
||||
*/
|
||||
#define SMEM_HW_SW_BUILD_ID 137
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
#define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32
|
||||
#define SMEM_IMAGE_VERSION_SIZE 4096
|
||||
#define SMEM_IMAGE_VERSION_NAME_SIZE 75
|
||||
#define SMEM_IMAGE_VERSION_VARIANT_SIZE 20
|
||||
#define SMEM_IMAGE_VERSION_OEM_SIZE 32
|
||||
|
||||
/*
|
||||
* SMEM Image table indices
|
||||
*/
|
||||
#define SMEM_IMAGE_TABLE_BOOT_INDEX 0
|
||||
#define SMEM_IMAGE_TABLE_TZ_INDEX 1
|
||||
#define SMEM_IMAGE_TABLE_RPM_INDEX 3
|
||||
#define SMEM_IMAGE_TABLE_APPS_INDEX 10
|
||||
#define SMEM_IMAGE_TABLE_MPSS_INDEX 11
|
||||
#define SMEM_IMAGE_TABLE_ADSP_INDEX 12
|
||||
#define SMEM_IMAGE_TABLE_CNSS_INDEX 13
|
||||
#define SMEM_IMAGE_TABLE_VIDEO_INDEX 14
|
||||
#define SMEM_IMAGE_VERSION_TABLE 469
|
||||
|
||||
/*
|
||||
* SMEM Image table names
|
||||
*/
|
||||
static const char *const socinfo_image_names[] = {
|
||||
[SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
|
||||
[SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
|
||||
[SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
|
||||
[SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
|
||||
[SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
|
||||
[SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
|
||||
[SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
|
||||
[SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
|
||||
};
|
||||
|
||||
static const char *const pmic_models[] = {
|
||||
[0] = "Unknown PMIC model",
|
||||
[9] = "PM8994",
|
||||
[11] = "PM8916",
|
||||
[13] = "PM8058",
|
||||
[14] = "PM8028",
|
||||
[15] = "PM8901",
|
||||
[16] = "PM8027",
|
||||
[17] = "ISL9519",
|
||||
[18] = "PM8921",
|
||||
[19] = "PM8018",
|
||||
[20] = "PM8015",
|
||||
[21] = "PM8014",
|
||||
[22] = "PM8821",
|
||||
[23] = "PM8038",
|
||||
[24] = "PM8922",
|
||||
[25] = "PM8917",
|
||||
};
|
||||
#endif /* CONFIG_DEBUG_FS */
|
||||
|
||||
/* Socinfo SMEM item structure */
|
||||
struct socinfo {
|
||||
__le32 fmt;
|
||||
__le32 id;
|
||||
__le32 ver;
|
||||
char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
|
||||
/* Version 2 */
|
||||
__le32 raw_id;
|
||||
__le32 raw_ver;
|
||||
/* Version 3 */
|
||||
__le32 hw_plat;
|
||||
/* Version 4 */
|
||||
__le32 plat_ver;
|
||||
/* Version 5 */
|
||||
__le32 accessory_chip;
|
||||
/* Version 6 */
|
||||
__le32 hw_plat_subtype;
|
||||
/* Version 7 */
|
||||
__le32 pmic_model;
|
||||
__le32 pmic_die_rev;
|
||||
/* Version 8 */
|
||||
__le32 pmic_model_1;
|
||||
__le32 pmic_die_rev_1;
|
||||
__le32 pmic_model_2;
|
||||
__le32 pmic_die_rev_2;
|
||||
/* Version 9 */
|
||||
__le32 foundry_id;
|
||||
/* Version 10 */
|
||||
__le32 serial_num;
|
||||
/* Version 11 */
|
||||
__le32 num_pmics;
|
||||
__le32 pmic_array_offset;
|
||||
/* Version 12 */
|
||||
__le32 chip_family;
|
||||
__le32 raw_device_family;
|
||||
__le32 raw_device_num;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
struct socinfo_params {
|
||||
u32 raw_device_family;
|
||||
u32 hw_plat_subtype;
|
||||
u32 accessory_chip;
|
||||
u32 raw_device_num;
|
||||
u32 chip_family;
|
||||
u32 foundry_id;
|
||||
u32 plat_ver;
|
||||
u32 raw_ver;
|
||||
u32 hw_plat;
|
||||
u32 fmt;
|
||||
};
|
||||
|
||||
struct smem_image_version {
|
||||
char name[SMEM_IMAGE_VERSION_NAME_SIZE];
|
||||
char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
|
||||
char pad;
|
||||
char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
|
||||
};
|
||||
#endif /* CONFIG_DEBUG_FS */
|
||||
|
||||
struct qcom_socinfo {
|
||||
struct soc_device *soc_dev;
|
||||
struct soc_device_attribute attr;
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
struct dentry *dbg_root;
|
||||
struct socinfo_params info;
|
||||
#endif /* CONFIG_DEBUG_FS */
|
||||
};
|
||||
|
||||
struct soc_id {
|
||||
unsigned int id;
|
||||
const char *name;
|
||||
};
|
||||
|
||||
static const struct soc_id soc_id[] = {
|
||||
{ 87, "MSM8960" },
|
||||
{ 109, "APQ8064" },
|
||||
{ 122, "MSM8660A" },
|
||||
{ 123, "MSM8260A" },
|
||||
{ 124, "APQ8060A" },
|
||||
{ 126, "MSM8974" },
|
||||
{ 130, "MPQ8064" },
|
||||
{ 138, "MSM8960AB" },
|
||||
{ 139, "APQ8060AB" },
|
||||
{ 140, "MSM8260AB" },
|
||||
{ 141, "MSM8660AB" },
|
||||
{ 178, "APQ8084" },
|
||||
{ 184, "APQ8074" },
|
||||
{ 185, "MSM8274" },
|
||||
{ 186, "MSM8674" },
|
||||
{ 194, "MSM8974PRO" },
|
||||
{ 206, "MSM8916" },
|
||||
{ 208, "APQ8074-AA" },
|
||||
{ 209, "APQ8074-AB" },
|
||||
{ 210, "APQ8074PRO" },
|
||||
{ 211, "MSM8274-AA" },
|
||||
{ 212, "MSM8274-AB" },
|
||||
{ 213, "MSM8274PRO" },
|
||||
{ 214, "MSM8674-AA" },
|
||||
{ 215, "MSM8674-AB" },
|
||||
{ 216, "MSM8674PRO" },
|
||||
{ 217, "MSM8974-AA" },
|
||||
{ 218, "MSM8974-AB" },
|
||||
{ 246, "MSM8996" },
|
||||
{ 247, "APQ8016" },
|
||||
{ 248, "MSM8216" },
|
||||
{ 249, "MSM8116" },
|
||||
{ 250, "MSM8616" },
|
||||
{ 291, "APQ8096" },
|
||||
{ 305, "MSM8996SG" },
|
||||
{ 310, "MSM8996AU" },
|
||||
{ 311, "APQ8096AU" },
|
||||
{ 312, "APQ8096SG" },
|
||||
};
|
||||
|
||||
static const char *socinfo_machine(struct device *dev, unsigned int id)
|
||||
{
|
||||
int idx;
|
||||
|
||||
for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
|
||||
if (soc_id[idx].id == id)
|
||||
return soc_id[idx].name;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
|
||||
#define QCOM_OPEN(name, _func) \
|
||||
static int qcom_open_##name(struct inode *inode, struct file *file) \
|
||||
{ \
|
||||
return single_open(file, _func, inode->i_private); \
|
||||
} \
|
||||
\
|
||||
static const struct file_operations qcom_ ##name## _ops = { \
|
||||
.open = qcom_open_##name, \
|
||||
.read = seq_read, \
|
||||
.llseek = seq_lseek, \
|
||||
.release = single_release, \
|
||||
}
|
||||
|
||||
#define DEBUGFS_ADD(info, name) \
|
||||
debugfs_create_file(__stringify(name), 0400, \
|
||||
qcom_socinfo->dbg_root, \
|
||||
info, &qcom_ ##name## _ops)
|
||||
|
||||
|
||||
static int qcom_show_build_id(struct seq_file *seq, void *p)
|
||||
{
|
||||
struct socinfo *socinfo = seq->private;
|
||||
|
||||
seq_printf(seq, "%s\n", socinfo->build_id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qcom_show_pmic_model(struct seq_file *seq, void *p)
|
||||
{
|
||||
struct socinfo *socinfo = seq->private;
|
||||
int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
|
||||
|
||||
if (model < 0)
|
||||
return -EINVAL;
|
||||
|
||||
seq_printf(seq, "%s\n", pmic_models[model]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
|
||||
{
|
||||
struct socinfo *socinfo = seq->private;
|
||||
|
||||
seq_printf(seq, "%u.%u\n",
|
||||
SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
|
||||
SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
QCOM_OPEN(build_id, qcom_show_build_id);
|
||||
QCOM_OPEN(pmic_model, qcom_show_pmic_model);
|
||||
QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
|
||||
|
||||
#define DEFINE_IMAGE_OPS(type) \
|
||||
static int show_image_##type(struct seq_file *seq, void *p) \
|
||||
{ \
|
||||
struct smem_image_version *image_version = seq->private; \
|
||||
seq_puts(seq, image_version->type); \
|
||||
seq_puts(seq, "\n"); \
|
||||
return 0; \
|
||||
} \
|
||||
static int open_image_##type(struct inode *inode, struct file *file) \
|
||||
{ \
|
||||
return single_open(file, show_image_##type, inode->i_private); \
|
||||
} \
|
||||
\
|
||||
static const struct file_operations qcom_image_##type##_ops = { \
|
||||
.open = open_image_##type, \
|
||||
.read = seq_read, \
|
||||
.llseek = seq_lseek, \
|
||||
.release = single_release, \
|
||||
}
|
||||
|
||||
DEFINE_IMAGE_OPS(name);
|
||||
DEFINE_IMAGE_OPS(variant);
|
||||
DEFINE_IMAGE_OPS(oem);
|
||||
|
||||
static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
|
||||
struct socinfo *info)
|
||||
{
|
||||
struct smem_image_version *versions;
|
||||
struct dentry *dentry;
|
||||
size_t size;
|
||||
int i;
|
||||
|
||||
qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
|
||||
|
||||
qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
|
||||
|
||||
switch (qcom_socinfo->info.fmt) {
|
||||
case SOCINFO_VERSION(0, 12):
|
||||
qcom_socinfo->info.chip_family =
|
||||
__le32_to_cpu(info->chip_family);
|
||||
qcom_socinfo->info.raw_device_family =
|
||||
__le32_to_cpu(info->raw_device_family);
|
||||
qcom_socinfo->info.raw_device_num =
|
||||
__le32_to_cpu(info->raw_device_num);
|
||||
|
||||
debugfs_create_x32("chip_family", 0400, qcom_socinfo->dbg_root,
|
||||
&qcom_socinfo->info.chip_family);
|
||||
debugfs_create_x32("raw_device_family", 0400,
|
||||
qcom_socinfo->dbg_root,
|
||||
&qcom_socinfo->info.raw_device_family);
|
||||
debugfs_create_x32("raw_device_number", 0400,
|
||||
qcom_socinfo->dbg_root,
|
||||
&qcom_socinfo->info.raw_device_num);
|
||||
/* Fall through */
|
||||
case SOCINFO_VERSION(0, 11):
|
||||
case SOCINFO_VERSION(0, 10):
|
||||
case SOCINFO_VERSION(0, 9):
|
||||
qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
|
||||
|
||||
debugfs_create_u32("foundry_id", 0400, qcom_socinfo->dbg_root,
|
||||
&qcom_socinfo->info.foundry_id);
|
||||
/* Fall through */
|
||||
case SOCINFO_VERSION(0, 8):
|
||||
case SOCINFO_VERSION(0, 7):
|
||||
DEBUGFS_ADD(info, pmic_model);
|
||||
DEBUGFS_ADD(info, pmic_die_rev);
|
||||
/* Fall through */
|
||||
case SOCINFO_VERSION(0, 6):
|
||||
qcom_socinfo->info.hw_plat_subtype =
|
||||
__le32_to_cpu(info->hw_plat_subtype);
|
||||
|
||||
debugfs_create_u32("hardware_platform_subtype", 0400,
|
||||
qcom_socinfo->dbg_root,
|
||||
&qcom_socinfo->info.hw_plat_subtype);
|
||||
/* Fall through */
|
||||
case SOCINFO_VERSION(0, 5):
|
||||
qcom_socinfo->info.accessory_chip =
|
||||
__le32_to_cpu(info->accessory_chip);
|
||||
|
||||
debugfs_create_u32("accessory_chip", 0400,
|
||||
qcom_socinfo->dbg_root,
|
||||
&qcom_socinfo->info.accessory_chip);
|
||||
/* Fall through */
|
||||
case SOCINFO_VERSION(0, 4):
|
||||
qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
|
||||
|
||||
debugfs_create_u32("platform_version", 0400,
|
||||
qcom_socinfo->dbg_root,
|
||||
&qcom_socinfo->info.plat_ver);
|
||||
/* Fall through */
|
||||
case SOCINFO_VERSION(0, 3):
|
||||
qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
|
||||
|
||||
debugfs_create_u32("hardware_platform", 0400,
|
||||
qcom_socinfo->dbg_root,
|
||||
&qcom_socinfo->info.hw_plat);
|
||||
/* Fall through */
|
||||
case SOCINFO_VERSION(0, 2):
|
||||
qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver);
|
||||
|
||||
debugfs_create_u32("raw_version", 0400, qcom_socinfo->dbg_root,
|
||||
&qcom_socinfo->info.raw_ver);
|
||||
/* Fall through */
|
||||
case SOCINFO_VERSION(0, 1):
|
||||
DEBUGFS_ADD(info, build_id);
|
||||
break;
|
||||
}
|
||||
|
||||
versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE,
|
||||
&size);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) {
|
||||
if (!socinfo_image_names[i])
|
||||
continue;
|
||||
|
||||
dentry = debugfs_create_dir(socinfo_image_names[i],
|
||||
qcom_socinfo->dbg_root);
|
||||
debugfs_create_file("name", 0400, dentry, &versions[i],
|
||||
&qcom_image_name_ops);
|
||||
debugfs_create_file("variant", 0400, dentry, &versions[i],
|
||||
&qcom_image_variant_ops);
|
||||
debugfs_create_file("oem", 0400, dentry, &versions[i],
|
||||
&qcom_image_oem_ops);
|
||||
}
|
||||
}
|
||||
|
||||
static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
|
||||
{
|
||||
debugfs_remove_recursive(qcom_socinfo->dbg_root);
|
||||
}
|
||||
#else
|
||||
static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
|
||||
struct socinfo *info)
|
||||
{
|
||||
}
|
||||
static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { }
|
||||
#endif /* CONFIG_DEBUG_FS */
|
||||
|
||||
static int qcom_socinfo_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct qcom_socinfo *qs;
|
||||
struct socinfo *info;
|
||||
size_t item_size;
|
||||
|
||||
info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
|
||||
&item_size);
|
||||
if (IS_ERR(info)) {
|
||||
dev_err(&pdev->dev, "Couldn't find socinfo\n");
|
||||
return PTR_ERR(info);
|
||||
}
|
||||
|
||||
qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
|
||||
if (!qs)
|
||||
return -ENOMEM;
|
||||
|
||||
qs->attr.family = "Snapdragon";
|
||||
qs->attr.machine = socinfo_machine(&pdev->dev,
|
||||
le32_to_cpu(info->id));
|
||||
qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
|
||||
SOCINFO_MAJOR(le32_to_cpu(info->ver)),
|
||||
SOCINFO_MINOR(le32_to_cpu(info->ver)));
|
||||
if (offsetof(struct socinfo, serial_num) <= item_size)
|
||||
qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
|
||||
"%u",
|
||||
le32_to_cpu(info->serial_num));
|
||||
|
||||
qs->soc_dev = soc_device_register(&qs->attr);
|
||||
if (IS_ERR(qs->soc_dev))
|
||||
return PTR_ERR(qs->soc_dev);
|
||||
|
||||
socinfo_debugfs_init(qs, info);
|
||||
|
||||
/* Feed the soc specific unique data into entropy pool */
|
||||
add_device_randomness(info, item_size);
|
||||
|
||||
platform_set_drvdata(pdev, qs->soc_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int qcom_socinfo_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct qcom_socinfo *qs = platform_get_drvdata(pdev);
|
||||
|
||||
soc_device_unregister(qs->soc_dev);
|
||||
|
||||
socinfo_debugfs_exit(qs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver qcom_socinfo_driver = {
|
||||
.probe = qcom_socinfo_probe,
|
||||
.remove = qcom_socinfo_remove,
|
||||
.driver = {
|
||||
.name = "qcom-socinfo",
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(qcom_socinfo_driver);
|
||||
|
||||
MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_ALIAS("platform:qcom-socinfo");
|
||||
|
|
@ -49,8 +49,9 @@ extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
|
|||
extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
|
||||
extern int qcom_scm_pas_shutdown(u32 peripheral);
|
||||
extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
|
||||
unsigned int *src, struct qcom_scm_vmperm *newvm,
|
||||
int dest_cnt);
|
||||
unsigned int *src,
|
||||
const struct qcom_scm_vmperm *newvm,
|
||||
unsigned int dest_cnt);
|
||||
extern void qcom_scm_cpu_power_down(u32 flags);
|
||||
extern u32 qcom_scm_get_version(void);
|
||||
extern int qcom_scm_set_remote_state(u32 state, u32 id);
|
||||
|
|
@ -87,8 +88,8 @@ qcom_scm_pas_auth_and_reset(u32 peripheral) { return -ENODEV; }
|
|||
static inline int qcom_scm_pas_shutdown(u32 peripheral) { return -ENODEV; }
|
||||
static inline int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
|
||||
unsigned int *src,
|
||||
struct qcom_scm_vmperm *newvm,
|
||||
int dest_cnt) { return -ENODEV; }
|
||||
const struct qcom_scm_vmperm *newvm,
|
||||
unsigned int dest_cnt) { return -ENODEV; }
|
||||
static inline void qcom_scm_cpu_power_down(u32 flags) {}
|
||||
static inline u32 qcom_scm_get_version(void) { return 0; }
|
||||
static inline u32
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ struct soc_device_attribute {
|
|||
const char *machine;
|
||||
const char *family;
|
||||
const char *revision;
|
||||
const char *serial_number;
|
||||
const char *soc_id;
|
||||
const void *data;
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue