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iio: imu: inv_mpu6050: fix frequency setting when chip is off
commitdaec424cc5
upstream. Track correctly FIFO state and apply ODR change before starting the chip. Without the fix, you cannot change ODR more than 1 time when data buffering is off. This restriction on a single pending ODR change should only apply when the FIFO is on. Fixes:111e1abd00
("iio: imu: inv_mpu6050: use the common inv_sensors timestamp module") Cc: stable@vger.kernel.org Signed-off-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> Link: https://lore.kernel.org/r/20240219154741.90601-1-inv.git-commit@tdk.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -111,6 +111,7 @@ int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable)
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if (enable) {
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/* reset timestamping */
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inv_sensors_timestamp_reset(&st->timestamp);
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inv_sensors_timestamp_apply_odr(&st->timestamp, 0, 0, 0);
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/* reset FIFO */
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d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_RST;
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ret = regmap_write(st->map, st->reg->user_ctrl, d);
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@ -184,6 +185,10 @@ static int inv_mpu6050_set_enable(struct iio_dev *indio_dev, bool enable)
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if (result)
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goto error_power_off;
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} else {
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st->chip_config.gyro_fifo_enable = 0;
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st->chip_config.accl_fifo_enable = 0;
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st->chip_config.temp_fifo_enable = 0;
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st->chip_config.magn_fifo_enable = 0;
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result = inv_mpu6050_prepare_fifo(st, false);
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if (result)
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goto error_power_off;
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