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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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sh: move the hp6xx pm code
Move the not-so-generic pm code from arch/sh/kernel/pm.c to the platform directory together with the rest of the hp6xx pm code. This is done to let non-hp6xx platforms enable CONFIG_PM. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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04645185d0
commit
3e51762759
5 changed files with 77 additions and 108 deletions
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@ -10,15 +10,91 @@
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#include <linux/suspend.h>
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#include <linux/errno.h>
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#include <linux/time.h>
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#include <linux/delay.h>
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#include <linux/gfp.h>
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#include <asm/io.h>
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#include <asm/hd64461.h>
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#include <mach/hp6xx.h>
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#include <cpu/dac.h>
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#include <asm/pm.h>
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#include <asm/freq.h>
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#include <asm/watchdog.h>
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#define INTR_OFFSET 0x600
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#define STBCR 0xffffff82
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#define STBCR2 0xffffff88
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#define STBCR_STBY 0x80
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#define STBCR_MSTP2 0x04
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#define MCR 0xffffff68
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#define RTCNT 0xffffff70
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#define MCR_RMODE 2
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#define MCR_RFSH 4
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extern u8 wakeup_start;
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extern u8 wakeup_end;
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static void pm_enter(void)
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{
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u8 stbcr, csr;
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u16 frqcr, mcr;
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u32 vbr_new, vbr_old;
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set_bl_bit();
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/* set wdt */
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csr = sh_wdt_read_csr();
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csr &= ~WTCSR_TME;
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csr |= WTCSR_CKS_4096;
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sh_wdt_write_csr(csr);
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csr = sh_wdt_read_csr();
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sh_wdt_write_cnt(0);
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/* disable PLL1 */
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frqcr = ctrl_inw(FRQCR);
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frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
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ctrl_outw(frqcr, FRQCR);
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/* enable standby */
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stbcr = ctrl_inb(STBCR);
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ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
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/* set self-refresh */
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mcr = ctrl_inw(MCR);
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ctrl_outw(mcr & ~MCR_RFSH, MCR);
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/* set interrupt handler */
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asm volatile("stc vbr, %0" : "=r" (vbr_old));
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vbr_new = get_zeroed_page(GFP_ATOMIC);
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udelay(50);
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memcpy((void*)(vbr_new + INTR_OFFSET),
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&wakeup_start, &wakeup_end - &wakeup_start);
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asm volatile("ldc %0, vbr" : : "r" (vbr_new));
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ctrl_outw(0, RTCNT);
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ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
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cpu_sleep();
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asm volatile("ldc %0, vbr" : : "r" (vbr_old));
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free_page(vbr_new);
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/* enable PLL1 */
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frqcr = ctrl_inw(FRQCR);
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frqcr |= FRQCR_PSTBY;
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ctrl_outw(frqcr, FRQCR);
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udelay(50);
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frqcr |= FRQCR_PLLEN;
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ctrl_outw(frqcr, FRQCR);
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ctrl_outb(stbcr, STBCR);
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clear_bl_bit();
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}
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static int hp6x0_pm_enter(suspend_state_t state)
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{
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u8 stbcr, stbcr2;
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@ -1,17 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright 2006 (c) Andriy Skulysh <askulysh@gmail.com>
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*
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*/
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#ifndef __ASM_SH_PM_H
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#define __ASM_SH_PM_H
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extern u8 wakeup_start;
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extern u8 wakeup_end;
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void pm_enter(void);
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#endif
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@ -25,7 +25,6 @@ obj-$(CONFIG_MODULES) += sh_ksyms_32.o module.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
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obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
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obj-$(CONFIG_PM) += pm.o
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obj-$(CONFIG_STACKTRACE) += stacktrace.o
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obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
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obj-$(CONFIG_KPROBES) += kprobes.o
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@ -15,7 +15,6 @@ obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
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obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
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obj-$(CONFIG_PM) += pm.o
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obj-$(CONFIG_STACKTRACE) += stacktrace.o
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obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
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obj-$(CONFIG_GENERIC_GPIO) += gpio.o
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@ -1,88 +0,0 @@
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/*
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* Generic Power Management Routine
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*
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* Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License.
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*/
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#include <linux/suspend.h>
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#include <linux/delay.h>
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#include <linux/gfp.h>
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#include <asm/freq.h>
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#include <asm/io.h>
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#include <asm/watchdog.h>
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#include <asm/pm.h>
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#define INTR_OFFSET 0x600
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#define STBCR 0xffffff82
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#define STBCR2 0xffffff88
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#define STBCR_STBY 0x80
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#define STBCR_MSTP2 0x04
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#define MCR 0xffffff68
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#define RTCNT 0xffffff70
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#define MCR_RMODE 2
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#define MCR_RFSH 4
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void pm_enter(void)
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{
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u8 stbcr, csr;
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u16 frqcr, mcr;
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u32 vbr_new, vbr_old;
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set_bl_bit();
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/* set wdt */
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csr = sh_wdt_read_csr();
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csr &= ~WTCSR_TME;
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csr |= WTCSR_CKS_4096;
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sh_wdt_write_csr(csr);
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csr = sh_wdt_read_csr();
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sh_wdt_write_cnt(0);
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/* disable PLL1 */
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frqcr = ctrl_inw(FRQCR);
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frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
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ctrl_outw(frqcr, FRQCR);
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/* enable standby */
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stbcr = ctrl_inb(STBCR);
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ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
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/* set self-refresh */
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mcr = ctrl_inw(MCR);
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ctrl_outw(mcr & ~MCR_RFSH, MCR);
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/* set interrupt handler */
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asm volatile("stc vbr, %0" : "=r" (vbr_old));
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vbr_new = get_zeroed_page(GFP_ATOMIC);
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udelay(50);
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memcpy((void*)(vbr_new + INTR_OFFSET),
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&wakeup_start, &wakeup_end - &wakeup_start);
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asm volatile("ldc %0, vbr" : : "r" (vbr_new));
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ctrl_outw(0, RTCNT);
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ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
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cpu_sleep();
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asm volatile("ldc %0, vbr" : : "r" (vbr_old));
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free_page(vbr_new);
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/* enable PLL1 */
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frqcr = ctrl_inw(FRQCR);
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frqcr |= FRQCR_PSTBY;
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ctrl_outw(frqcr, FRQCR);
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udelay(50);
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frqcr |= FRQCR_PLLEN;
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ctrl_outw(frqcr, FRQCR);
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ctrl_outb(stbcr, STBCR);
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clear_bl_bit();
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}
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