dt-bindings: mmc: Add DQS trim value to Tegra SDHCI

Document HS400 DQS trim value device tree property.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Aapo Vienamo 2018-08-10 21:13:58 +03:00 committed by Ulf Hansson
parent 2ad5005157
commit 3ecea59d27

View file

@ -71,6 +71,7 @@ Optional properties for Tegra210 and Tegra186:
trimmer value for non-tunable modes. trimmer value for non-tunable modes.
- nvidia,default-trim : Specify the default outbound clock trimmer - nvidia,default-trim : Specify the default outbound clock trimmer
value. value.
- nvidia,dqs-trim : Specify DQS trim value for HS400 timing
Notes on the pad calibration pull up and pulldown offset values: Notes on the pad calibration pull up and pulldown offset values:
- The property values are drive codes which are programmed into the - The property values are drive codes which are programmed into the
@ -87,6 +88,9 @@ Optional properties for Tegra210 and Tegra186:
- The values are programmed to the Vendor Clock Control Register. - The values are programmed to the Vendor Clock Control Register.
Please refer to the reference manual of the SoC for correct Please refer to the reference manual of the SoC for correct
values. values.
- The DQS trim values are only used on controllers which support
HS400 timing. Only SDMMC4 on Tegra210 and Tegra 186 supports
HS400.
Example: Example:
sdhci@700b0000 { sdhci@700b0000 {