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dt-bindings: mmc: Add DQS trim value to Tegra SDHCI
Document HS400 DQS trim value device tree property. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -71,6 +71,7 @@ Optional properties for Tegra210 and Tegra186:
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trimmer value for non-tunable modes.
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- nvidia,default-trim : Specify the default outbound clock trimmer
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value.
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- nvidia,dqs-trim : Specify DQS trim value for HS400 timing
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Notes on the pad calibration pull up and pulldown offset values:
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- The property values are drive codes which are programmed into the
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@ -87,6 +88,9 @@ Optional properties for Tegra210 and Tegra186:
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- The values are programmed to the Vendor Clock Control Register.
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Please refer to the reference manual of the SoC for correct
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values.
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- The DQS trim values are only used on controllers which support
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HS400 timing. Only SDMMC4 on Tegra210 and Tegra 186 supports
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HS400.
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Example:
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sdhci@700b0000 {
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