clk: vc5: Use `clamp()` to restrict PLL range
The VCO frequency needs to be within a certain range and the driver enforces this. Make use of the clamp macro to implement this instead of open-coding it. This makes the code a bit shorter and also semanticly stronger. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20230114233500.3294789-1-lars@metafoo.de Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -449,10 +449,7 @@ static long vc5_pll_round_rate(struct clk_hw *hw, unsigned long rate,
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u32 div_int;
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u64 div_frc;
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if (rate < VC5_PLL_VCO_MIN)
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rate = VC5_PLL_VCO_MIN;
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if (rate > VC5_PLL_VCO_MAX)
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rate = VC5_PLL_VCO_MAX;
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rate = clamp(rate, VC5_PLL_VCO_MIN, VC5_PLL_VCO_MAX);
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/* Determine integer part, which is 12 bit wide */
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div_int = rate / *parent_rate;
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