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Revert "net: dsa: bcm_sf2: Also configure Port 5 for 2Gb/sec on 7278"

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This reverts commit 7458bd540f ("net: dsa:
bcm_sf2: Also configure Port 5 for 2Gb/sec on 7278") as it causes
advanced congestion buffering issues with 7278 switch devices when using
their internal Giabit PHY. While this is being debugged, continue with
conservative defaults that work and do not cause packet loss.

Fixes: 7458bd540f ("net: dsa: bcm_sf2: Also configure Port 5 for 2Gb/sec on 7278")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Florian Fainelli 2020-02-24 15:44:26 -08:00 committed by David S. Miller
parent bb0858d8bc
commit 3f02735e5d
2 changed files with 0 additions and 4 deletions
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3
drivers/net/dsa/bcm_sf2.c
View file

@ -616,9 +616,6 @@ static void bcm_sf2_sw_mac_config(struct dsa_switch *ds, int port,
if (state->duplex == DUPLEX_FULL)
reg |= DUPLX_MODE;
if (priv->type == BCM7278_DEVICE_ID && dsa_is_cpu_port(ds, port))
reg |= GMIIP_SPEED_UP_2G;
core_writel(priv, reg, offset);
}

1
drivers/net/dsa/bcm_sf2_regs.h
View file

@ -178,7 +178,6 @@ enum bcm_sf2_reg_offs {
#define RXFLOW_CNTL (1 << 4)
#define TXFLOW_CNTL (1 << 5)
#define SW_OVERRIDE (1 << 6)
#define GMIIP_SPEED_UP_2G (1 << 7)
#define CORE_WATCHDOG_CTRL 0x001e4
#define SOFTWARE_RESET (1 << 7)