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arm64: dts: hi3798cv200: fix the size of GICR
commit428a575dc9
upstream. During boot, Linux kernel complains: [ 0.000000] GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set This SoC is using a regular GIC-400 and the GICR space size should be 8KB rather than 256B. With this patch: [ 0.000000] GIC: Using split EOI/Deactivate mode So this should be the correct fix. Fixes:2f20182ed6
("arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board") Signed-off-by: Yang Xiwen <forbidden405@outlook.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20240219-cache-v3-1-a33c57534ae9@outlook.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -58,7 +58,7 @@ cpu@3 {
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gic: interrupt-controller@f1001000 {
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compatible = "arm,gic-400";
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reg = <0x0 0xf1001000 0x0 0x1000>, /* GICD */
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<0x0 0xf1002000 0x0 0x100>; /* GICC */
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<0x0 0xf1002000 0x0 0x2000>; /* GICC */
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#address-cells = <0>;
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#interrupt-cells = <3>;
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interrupt-controller;
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