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Merge branch 'dsa-multi-swtich'
Andrew Lunn says: ==================== D in DSA patches The D in DSA is distributed, meaning multiple switches can be connected together. Currently no mainline system does this, and so the code is broken. This patchset contains two fixes, and a small helper. With three of more switches, the current device tree binding is not sufficient to express the routing between the switches. The first patch extends the binding, in a backwards compatible way, to allow a link between a switch to describe all the switches accessible over the link, not just the direct neighbor. The third patch fixes the port configuration on newer devices for links connecting switches. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
3f0bf60f96
4 changed files with 71 additions and 23 deletions
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@ -44,9 +44,10 @@ Note that a port labelled "dsa" will imply checking for the uplink phandle
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described below.
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Optionnal property:
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- link : Should be a phandle to another switch's DSA port.
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- link : Should be a list of phandles to another switch's DSA port.
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This property is only used when switches are being
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chained/cascaded together.
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chained/cascaded together. This port is used as outgoing port
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towards the phandle port, which can be more than one hop away.
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- phy-handle : Phandle to a PHY on an external MDIO bus, not the
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switch internal one. See
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@ -100,10 +101,11 @@ Example:
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label = "cpu";
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};
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switch0uplink: port@6 {
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switch0port6: port@6 {
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reg = <6>;
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label = "dsa";
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link = <&switch1uplink>;
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link = <&switch1port0
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&switch2port0>;
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};
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};
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@ -113,10 +115,29 @@ Example:
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reg = <17 1>; /* MDIO address 17, switch 1 in tree */
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mii-bus = <&mii_bus1>;
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switch1uplink: port@0 {
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switch1port0: port@0 {
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reg = <0>;
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label = "dsa";
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link = <&switch0uplink>;
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link = <&switch0port6>;
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};
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switch1port1: port@1 {
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reg = <1>;
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label = "dsa";
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link = <&switch2port1>;
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};
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};
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switch@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <18 2>; /* MDIO address 18, switch 2 in tree */
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mii-bus = <&mii_bus1>;
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switch2port0: port@0 {
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reg = <0>;
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label = "dsa";
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link = <&switch1port1
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&switch0port6>;
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};
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};
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};
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@ -1926,8 +1926,7 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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* full duplex.
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*/
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reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL);
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if (dsa_is_cpu_port(ds, port) ||
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ds->dsa_port_mask & (1 << port)) {
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if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) {
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reg |= PORT_PCS_CTRL_FORCE_LINK |
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PORT_PCS_CTRL_LINK_UP |
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PORT_PCS_CTRL_DUPLEX_FULL |
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@ -1988,12 +1987,15 @@ static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)
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reg |= PORT_CONTROL_EGRESS_ADD_TAG;
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}
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}
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) ||
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mv88e6xxx_6320_family(ds)) {
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if (ds->dsa_port_mask & (1 << port))
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if (dsa_is_dsa_port(ds, port)) {
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if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds))
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reg |= PORT_CONTROL_DSA_TAG;
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if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||
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mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||
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mv88e6xxx_6320_family(ds)) {
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reg |= PORT_CONTROL_FRAME_MODE_DSA;
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}
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if (port == dsa_upstream_port(ds))
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reg |= PORT_CONTROL_FORWARD_UNKNOWN |
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PORT_CONTROL_FORWARD_UNKNOWN_MC;
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@ -171,6 +171,11 @@ static inline bool dsa_is_cpu_port(struct dsa_switch *ds, int p)
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return !!(ds->index == ds->dst->cpu_switch && p == ds->dst->cpu_port);
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}
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static inline bool dsa_is_dsa_port(struct dsa_switch *ds, int p)
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{
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return !!((ds->dsa_port_mask) & (1 << p));
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}
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static inline bool dsa_is_port_initialized(struct dsa_switch *ds, int p)
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{
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return ds->phys_port_mask & (1 << p) && ds->ports[p];
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@ -554,6 +554,31 @@ static int dsa_of_setup_routing_table(struct dsa_platform_data *pd,
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return 0;
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}
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static int dsa_of_probe_links(struct dsa_platform_data *pd,
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struct dsa_chip_data *cd,
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int chip_index, int port_index,
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struct device_node *port,
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const char *port_name)
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{
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struct device_node *link;
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int link_index;
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int ret;
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for (link_index = 0;; link_index++) {
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link = of_parse_phandle(port, "link", link_index);
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if (!link)
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break;
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if (!strcmp(port_name, "dsa") && pd->nr_chips > 1) {
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ret = dsa_of_setup_routing_table(pd, cd, chip_index,
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port_index, link);
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if (ret)
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return ret;
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}
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}
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return 0;
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}
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static void dsa_of_free_platform_data(struct dsa_platform_data *pd)
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{
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int i;
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@ -573,7 +598,7 @@ static void dsa_of_free_platform_data(struct dsa_platform_data *pd)
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static int dsa_of_probe(struct device *dev)
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{
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struct device_node *np = dev->of_node;
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struct device_node *child, *mdio, *ethernet, *port, *link;
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struct device_node *child, *mdio, *ethernet, *port;
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struct mii_bus *mdio_bus, *mdio_bus_switch;
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struct net_device *ethernet_dev;
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struct dsa_platform_data *pd;
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@ -668,15 +693,10 @@ static int dsa_of_probe(struct device *dev)
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goto out_free_chip;
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}
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link = of_parse_phandle(port, "link", 0);
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if (!strcmp(port_name, "dsa") && link &&
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pd->nr_chips > 1) {
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ret = dsa_of_setup_routing_table(pd, cd,
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chip_index, port_index, link);
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if (ret)
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goto out_free_chip;
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}
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ret = dsa_of_probe_links(pd, cd, chip_index,
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port_index, port, port_name);
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if (ret)
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goto out_free_chip;
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}
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}
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