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pwm: Changes for v6.1-rc1
The Rockchip and Mediatek drivers gain support for more chips and the LPSS driver undergoes some refactoring and receives some improvements. Other than that there are various cleanups of the core. -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmM+9MgZHHRoaWVycnku cmVkaW5nQGdtYWlsLmNvbQAKCRDdI6zXfz6zod9GD/4qFiwglyU81Aw56voXQPDS MJ9+DLBlfhnC8KtGmhPBOc4xjr+hf3QuCr6by/PbT3C3cUBFVjFWoaxCGKFzSoGP Vkt0ZuaRwBycp4z5dhOR8VhnJcLOcd155o13mv+J/Gzt1LJxq4ipwb2lNDqMBux2 37VjpQUvAQmmt/mhNhR/YHs9UKcjMB/HEcTUAha77l2wTxmRydr9tHKkl/8AalPM N+9KEsurmpqmLJgWJUXZpBF3YDf+o1S4m0/4/LPN7GTfOvFSNmE8D2Rmc/5YzEQU oePdqxfXEgDwB/a5ZDOnuqWfPscNAxh2fELkG42sAqX/8LXn+tZ6LUbuWzwT2hQy CWBJbP79A+7bkHPuoXnrJsnIULSbXEd8g9j0JfTIT2CDN1Usjl5K+nNWS68a66qi iJMh16hYsjwSURuJG+t0AttWutZKFXGDV3vTompaoM92jhEyrsfnT1jrFc3aUzYW lwRKdP+ANTWEe/4x2LitmOavmbM5Q/2afFV3NXNV06xPAlqMM/GWRM614OV1d4AV mBr8eXKbKUR4SqOwPVSbG2eqOshMriuWmESjw3O2hO+dz5ZHzQQgwB5/3IUMAu1C /GWG9fzOZ/mtesggyfSh/ml5juzJDYhWqBJquXRFKNoX254xSqmhNusvq3KnECnO f2E5mNuj4n9ea+OmqRl/lQ== =zTfN -----END PGP SIGNATURE----- Merge tag 'pwm/for-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "The Rockchip and Mediatek drivers gain support for more chips and the LPSS driver undergoes some refactoring and receives some improvements. Other than that there are various cleanups of the core" * tag 'pwm/for-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: sysfs: Replace sprintf() with sysfs_emit() pwm: core: Replace custom implementation of device_match_fwnode() pwm: lpss: Add a comment to the bypass field pwm: lpss: Make use of bits.h macros for all masks pwm: lpss: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros pwm: lpss: Use device_get_match_data() to get device data pwm: lpss: Move resource mapping to the glue drivers pwm: lpss: Move exported symbols to PWM_LPSS namespace pwm: lpss: Deduplicate board info data structures dt-bindings: pwm: Add compatible for Mediatek MT8188 dt-bindings: pwm: rockchip: Add rockchip,rk3128-pwm dt-bindings: pwm: rockchip: Add description for rk3588 pwm: sysfs: Switch to DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr() pwm: rockchip: Convert to use dev_err_probe()
This commit is contained in:
Linus Torvalds
commit
3fb55dd140
9 changed files with 92 additions and 97 deletions
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@ -27,6 +27,7 @@ properties:
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- items:
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- enum:
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- mediatek,mt8186-disp-pwm
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- mediatek,mt8188-disp-pwm
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- mediatek,mt8192-disp-pwm
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- mediatek,mt8195-disp-pwm
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- const: mediatek,mt8183-disp-pwm
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@ -21,6 +21,7 @@ properties:
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- const: rockchip,rk2928-pwm
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- items:
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- enum:
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- rockchip,rk3128-pwm
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- rockchip,rk3368-pwm
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- rockchip,rk3399-pwm
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- rockchip,rv1108-pwm
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@ -30,6 +31,7 @@ properties:
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- rockchip,px30-pwm
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- rockchip,rk3308-pwm
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- rockchip,rk3568-pwm
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- rockchip,rk3588-pwm
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- const: rockchip,rk3328-pwm
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reg:
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@ -678,7 +678,7 @@ static struct pwm_chip *fwnode_to_pwmchip(struct fwnode_handle *fwnode)
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mutex_lock(&pwm_lock);
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list_for_each_entry(chip, &pwm_chips, list)
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if (chip->dev && dev_fwnode(chip->dev) == fwnode) {
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if (chip->dev && device_match_fwnode(chip->dev, fwnode)) {
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mutex_unlock(&pwm_lock);
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return chip;
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}
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@ -14,35 +14,6 @@
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#include "pwm-lpss.h"
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/* BayTrail */
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static const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
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.clk_rate = 25000000,
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.npwm = 1,
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.base_unit_bits = 16,
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};
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/* Braswell */
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static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
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.clk_rate = 19200000,
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.npwm = 1,
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.base_unit_bits = 16,
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};
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/* Broxton */
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static const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
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.clk_rate = 19200000,
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.npwm = 4,
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.base_unit_bits = 22,
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.bypass = true,
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};
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/* Tangier */
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static const struct pwm_lpss_boardinfo pwm_lpss_tng_info = {
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.clk_rate = 19200000,
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.npwm = 4,
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.base_unit_bits = 22,
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};
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static int pwm_lpss_probe_pci(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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@ -54,8 +25,12 @@ static int pwm_lpss_probe_pci(struct pci_dev *pdev,
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if (err < 0)
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return err;
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err = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));
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if (err)
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return err;
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info = (struct pwm_lpss_boardinfo *)id->driver_data;
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lpwm = pwm_lpss_probe(&pdev->dev, &pdev->resource[0], info);
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lpwm = pwm_lpss_probe(&pdev->dev, pcim_iomap_table(pdev)[0], info);
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if (IS_ERR(lpwm))
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return PTR_ERR(lpwm);
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@ -73,7 +48,6 @@ static void pwm_lpss_remove_pci(struct pci_dev *pdev)
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pm_runtime_get_sync(&pdev->dev);
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}
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#ifdef CONFIG_PM
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static int pwm_lpss_runtime_suspend_pci(struct device *dev)
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{
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/*
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@ -87,12 +61,11 @@ static int pwm_lpss_runtime_resume_pci(struct device *dev)
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{
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return 0;
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}
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#endif
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static const struct dev_pm_ops pwm_lpss_pci_pm = {
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SET_RUNTIME_PM_OPS(pwm_lpss_runtime_suspend_pci,
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pwm_lpss_runtime_resume_pci, NULL)
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};
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static DEFINE_RUNTIME_DEV_PM_OPS(pwm_lpss_pci_pm,
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pwm_lpss_runtime_suspend_pci,
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pwm_lpss_runtime_resume_pci,
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NULL);
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static const struct pci_device_id pwm_lpss_pci_ids[] = {
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{ PCI_VDEVICE(INTEL, 0x0ac8), (unsigned long)&pwm_lpss_bxt_info},
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@ -114,10 +87,11 @@ static struct pci_driver pwm_lpss_driver_pci = {
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.probe = pwm_lpss_probe_pci,
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.remove = pwm_lpss_remove_pci,
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.driver = {
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.pm = &pwm_lpss_pci_pm,
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.pm = pm_ptr(&pwm_lpss_pci_pm),
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},
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};
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module_pci_driver(pwm_lpss_driver_pci);
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MODULE_DESCRIPTION("PWM PCI driver for Intel LPSS");
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MODULE_LICENSE("GPL v2");
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MODULE_IMPORT_NS(PWM_LPSS);
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@ -7,52 +7,31 @@
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* Derived from the original pwm-lpss.c
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*/
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#include <linux/acpi.h>
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#include <linux/kernel.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/property.h>
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#include "pwm-lpss.h"
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/* BayTrail */
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static const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
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.clk_rate = 25000000,
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.npwm = 1,
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.base_unit_bits = 16,
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};
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/* Braswell */
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static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
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.clk_rate = 19200000,
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.npwm = 1,
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.base_unit_bits = 16,
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.other_devices_aml_touches_pwm_regs = true,
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};
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/* Broxton */
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static const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
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.clk_rate = 19200000,
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.npwm = 4,
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.base_unit_bits = 22,
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.bypass = true,
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};
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static int pwm_lpss_probe_platform(struct platform_device *pdev)
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{
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const struct pwm_lpss_boardinfo *info;
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const struct acpi_device_id *id;
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struct pwm_lpss_chip *lpwm;
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struct resource *r;
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void __iomem *base;
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id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
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if (!id)
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info = device_get_match_data(&pdev->dev);
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if (!info)
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return -ENODEV;
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info = (const struct pwm_lpss_boardinfo *)id->driver_data;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(base))
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return PTR_ERR(base);
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lpwm = pwm_lpss_probe(&pdev->dev, r, info);
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lpwm = pwm_lpss_probe(&pdev->dev, base, info);
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if (IS_ERR(lpwm))
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return PTR_ERR(lpwm);
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@ -110,4 +89,5 @@ module_platform_driver(pwm_lpss_driver_platform);
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MODULE_DESCRIPTION("PWM platform driver for Intel LPSS");
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MODULE_LICENSE("GPL v2");
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MODULE_IMPORT_NS(PWM_LPSS);
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MODULE_ALIAS("platform:pwm-lpss");
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@ -10,6 +10,7 @@
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* Author: Alan Cox <alan@linux.intel.com>
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*/
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#include <linux/bits.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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@ -18,17 +19,53 @@
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#include <linux/pm_runtime.h>
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#include <linux/time.h>
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#define DEFAULT_SYMBOL_NAMESPACE PWM_LPSS
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#include "pwm-lpss.h"
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#define PWM 0x00000000
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#define PWM_ENABLE BIT(31)
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#define PWM_SW_UPDATE BIT(30)
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#define PWM_BASE_UNIT_SHIFT 8
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#define PWM_ON_TIME_DIV_MASK 0x000000ff
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#define PWM_ON_TIME_DIV_MASK GENMASK(7, 0)
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/* Size of each PWM register space if multiple */
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#define PWM_SIZE 0x400
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/* BayTrail */
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const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
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.clk_rate = 25000000,
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.npwm = 1,
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.base_unit_bits = 16,
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};
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EXPORT_SYMBOL_GPL(pwm_lpss_byt_info);
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/* Braswell */
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const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
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.clk_rate = 19200000,
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.npwm = 1,
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.base_unit_bits = 16,
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.other_devices_aml_touches_pwm_regs = true,
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};
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EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info);
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/* Broxton */
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const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
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.clk_rate = 19200000,
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.npwm = 4,
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.base_unit_bits = 22,
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.bypass = true,
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};
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EXPORT_SYMBOL_GPL(pwm_lpss_bxt_info);
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/* Tangier */
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const struct pwm_lpss_boardinfo pwm_lpss_tng_info = {
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.clk_rate = 19200000,
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.npwm = 4,
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.base_unit_bits = 22,
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};
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EXPORT_SYMBOL_GPL(pwm_lpss_tng_info);
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static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
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{
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return container_of(chip, struct pwm_lpss_chip, chip);
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@ -207,7 +244,7 @@ static const struct pwm_ops pwm_lpss_ops = {
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.owner = THIS_MODULE,
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};
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struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
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struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base,
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const struct pwm_lpss_boardinfo *info)
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{
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struct pwm_lpss_chip *lpwm;
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@ -222,10 +259,7 @@ struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
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if (!lpwm)
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return ERR_PTR(-ENOMEM);
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lpwm->regs = devm_ioremap_resource(dev, r);
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if (IS_ERR(lpwm->regs))
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return ERR_CAST(lpwm->regs);
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lpwm->regs = base;
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lpwm->info = info;
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c = lpwm->info->clk_rate;
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@ -25,6 +25,11 @@ struct pwm_lpss_boardinfo {
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unsigned long clk_rate;
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unsigned int npwm;
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unsigned long base_unit_bits;
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/*
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* Some versions of the IP may stuck in the state machine if enable
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* bit is not set, and hence update bit will show busy status till
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* the reset. For the rest it may be otherwise.
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*/
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bool bypass;
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/*
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* On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device
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@ -33,7 +38,12 @@ struct pwm_lpss_boardinfo {
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bool other_devices_aml_touches_pwm_regs;
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};
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struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
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extern const struct pwm_lpss_boardinfo pwm_lpss_byt_info;
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extern const struct pwm_lpss_boardinfo pwm_lpss_bsw_info;
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extern const struct pwm_lpss_boardinfo pwm_lpss_bxt_info;
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extern const struct pwm_lpss_boardinfo pwm_lpss_tng_info;
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struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base,
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const struct pwm_lpss_boardinfo *info);
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#endif /* __PWM_LPSS_H */
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@ -328,22 +328,16 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
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else
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pc->pclk = pc->clk;
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if (IS_ERR(pc->pclk)) {
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ret = PTR_ERR(pc->pclk);
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if (ret != -EPROBE_DEFER)
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dev_err(&pdev->dev, "Can't get APB clk: %d\n", ret);
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return ret;
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}
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if (IS_ERR(pc->pclk))
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return dev_err_probe(&pdev->dev, PTR_ERR(pc->pclk), "Can't get APB clk\n");
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ret = clk_prepare_enable(pc->clk);
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if (ret) {
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dev_err(&pdev->dev, "Can't prepare enable PWM clk: %d\n", ret);
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return ret;
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}
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if (ret)
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return dev_err_probe(&pdev->dev, ret, "Can't prepare enable PWM clk\n");
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ret = clk_prepare_enable(pc->pclk);
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if (ret) {
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dev_err(&pdev->dev, "Can't prepare enable APB clk: %d\n", ret);
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dev_err_probe(&pdev->dev, ret, "Can't prepare enable APB clk\n");
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goto err_clk;
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}
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@ -360,7 +354,7 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
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ret = pwmchip_add(&pc->chip);
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if (ret < 0) {
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dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
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dev_err_probe(&pdev->dev, ret, "pwmchip_add() failed\n");
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goto err_pclk;
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}
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|
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@ -42,7 +42,7 @@ static ssize_t period_show(struct device *child,
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pwm_get_state(pwm, &state);
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return sprintf(buf, "%llu\n", state.period);
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return sysfs_emit(buf, "%llu\n", state.period);
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}
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static ssize_t period_store(struct device *child,
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@ -77,7 +77,7 @@ static ssize_t duty_cycle_show(struct device *child,
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pwm_get_state(pwm, &state);
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return sprintf(buf, "%llu\n", state.duty_cycle);
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return sysfs_emit(buf, "%llu\n", state.duty_cycle);
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}
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static ssize_t duty_cycle_store(struct device *child,
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|
|
@ -112,7 +112,7 @@ static ssize_t enable_show(struct device *child,
|
|||
|
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pwm_get_state(pwm, &state);
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return sprintf(buf, "%d\n", state.enabled);
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return sysfs_emit(buf, "%d\n", state.enabled);
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||||
}
|
||||
|
||||
static ssize_t enable_store(struct device *child,
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|
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@ -171,7 +171,7 @@ static ssize_t polarity_show(struct device *child,
|
|||
break;
|
||||
}
|
||||
|
||||
return sprintf(buf, "%s\n", polarity);
|
||||
return sysfs_emit(buf, "%s\n", polarity);
|
||||
}
|
||||
|
||||
static ssize_t polarity_store(struct device *child,
|
||||
|
|
@ -212,7 +212,7 @@ static ssize_t capture_show(struct device *child,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
return sprintf(buf, "%u %u\n", result.period, result.duty_cycle);
|
||||
return sysfs_emit(buf, "%u %u\n", result.period, result.duty_cycle);
|
||||
}
|
||||
|
||||
static DEVICE_ATTR_RW(period);
|
||||
|
|
@ -361,7 +361,7 @@ static ssize_t npwm_show(struct device *parent, struct device_attribute *attr,
|
|||
{
|
||||
const struct pwm_chip *chip = dev_get_drvdata(parent);
|
||||
|
||||
return sprintf(buf, "%u\n", chip->npwm);
|
||||
return sysfs_emit(buf, "%u\n", chip->npwm);
|
||||
}
|
||||
static DEVICE_ATTR_RO(npwm);
|
||||
|
||||
|
|
@ -433,7 +433,7 @@ static int pwm_class_resume_npwm(struct device *parent, unsigned int npwm)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __maybe_unused pwm_class_suspend(struct device *parent)
|
||||
static int pwm_class_suspend(struct device *parent)
|
||||
{
|
||||
struct pwm_chip *chip = dev_get_drvdata(parent);
|
||||
unsigned int i;
|
||||
|
|
@ -464,20 +464,20 @@ static int __maybe_unused pwm_class_suspend(struct device *parent)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __maybe_unused pwm_class_resume(struct device *parent)
|
||||
static int pwm_class_resume(struct device *parent)
|
||||
{
|
||||
struct pwm_chip *chip = dev_get_drvdata(parent);
|
||||
|
||||
return pwm_class_resume_npwm(parent, chip->npwm);
|
||||
}
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(pwm_class_pm_ops, pwm_class_suspend, pwm_class_resume);
|
||||
static DEFINE_SIMPLE_DEV_PM_OPS(pwm_class_pm_ops, pwm_class_suspend, pwm_class_resume);
|
||||
|
||||
static struct class pwm_class = {
|
||||
.name = "pwm",
|
||||
.owner = THIS_MODULE,
|
||||
.dev_groups = pwm_chip_groups,
|
||||
.pm = &pwm_class_pm_ops,
|
||||
.pm = pm_sleep_ptr(&pwm_class_pm_ops),
|
||||
};
|
||||
|
||||
static int pwmchip_sysfs_match(struct device *parent, const void *data)
|
||||
|
|
|
|||
Loading…
Reference in a new issue