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ARM: OMAP: DMTimer: Optimize by adding load and start
This patch optimizes the timer load and start sequence. By combining the load and start a needless posted wait can be removed from the system timer execution path. * Before patch register writes are taking up .078% @ 500MHz during idle. Address |total |min |max |avr |count|ratio% old\process\default_idle|7.369s |0.0us|999.902ms|14.477ms|509. |62.661% ld\Global\cpu_v7_do_idle|4.265s |0.0us|375.786ms|24.374ms|175. |36.270% (UNKNOWN)|17.503ms|0.us|531.080us|5.119us|3419. |0.148% r\omap_dm_timer_set_load|8.135ms|0.0us|79.887us|15.065us|540. |0.069% <-- \vmlinux-old\Global\_end|2.023ms|0.0us|4.000us|0.560us|3613. |0.017% -old\Global\__raw_readsw|1.962ms|0.0us|108.610us|9.167us|214. |0.016% old\smc91x\smc_interrupt|1.353ms|0.0us|10.212us|2.348us|576. |0.011% s/namei\__link_path_walk|1.161ms|0.0us|4.310us|0.762us| 1524. |0.009% \omap_dm_timer_write_reg|1.085ms|0.0us|126.150us|2.153us|504. |0.009% <-- * After patch timer functions do not show up in top listings for long captures. Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
0f0d080709
commit
3fddd09e59
3 changed files with 22 additions and 7 deletions
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@ -59,8 +59,7 @@ static struct irqaction omap2_gp_timer_irq = {
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static int omap2_gp_timer_set_next_event(unsigned long cycles,
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struct clock_event_device *evt)
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{
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omap_dm_timer_set_load(gptimer, 0, 0xffffffff - cycles);
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omap_dm_timer_start(gptimer);
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omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles);
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return 0;
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}
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@ -77,8 +76,7 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
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period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
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period -= 1;
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omap_dm_timer_set_load(gptimer, 1, 0xffffffff - period);
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omap_dm_timer_start(gptimer);
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omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period);
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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break;
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@ -172,8 +170,7 @@ static void __init omap2_gp_clocksource_init(void)
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tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt));
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tick_period = (tick_rate / HZ) - 1;
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omap_dm_timer_set_load(gpt, 1, 0);
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omap_dm_timer_start(gpt);
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omap_dm_timer_set_load_start(gpt, 1, 0);
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clocksource_gpt.mult =
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clocksource_khz2mult(tick_rate/1000, clocksource_gpt.shift);
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@ -546,6 +546,24 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
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omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
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}
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/* Optimized set_load which removes costly spin wait in timer_start */
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void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
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unsigned int load)
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{
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u32 l;
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l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
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if (autoreload)
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l |= OMAP_TIMER_CTRL_AR;
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else
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l &= ~OMAP_TIMER_CTRL_AR;
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l |= OMAP_TIMER_CTRL_ST;
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omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load);
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omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
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omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
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}
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void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
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unsigned int match)
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{
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@ -560,7 +578,6 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
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omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
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}
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void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
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int toggle, int trigger)
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{
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@ -66,6 +66,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer);
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void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
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void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
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void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
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void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
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void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
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void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
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