mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-28 20:02:17 +00:00
rtc: ds1307: correct register offset for rx8130
While rx8130 has a register offset of 0x10 in its chip_desc, this isn't
used when regmap accesses are done. So add 0x10 to access the right
locations.
Fixes: ee0981be77
("rtc: ds1307: Add support for Epson RX8130CE")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
parent
d0e3f61b08
commit
3ffd4a2fcf
1 changed files with 7 additions and 6 deletions
|
@ -114,14 +114,15 @@ enum ds_type {
|
|||
# define RX8025_BIT_VDET 0x40
|
||||
# define RX8025_BIT_XST 0x20
|
||||
|
||||
#define RX8130_REG_ALARM_MIN 0x07
|
||||
#define RX8130_REG_ALARM_HOUR 0x08
|
||||
#define RX8130_REG_ALARM_WEEK_OR_DAY 0x09
|
||||
#define RX8130_REG_EXTENSION 0x0c
|
||||
#define RX8130_REG_ALARM_MIN 0x17
|
||||
#define RX8130_REG_ALARM_HOUR 0x18
|
||||
#define RX8130_REG_ALARM_WEEK_OR_DAY 0x19
|
||||
#define RX8130_REG_EXTENSION 0x1c
|
||||
#define RX8130_REG_EXTENSION_WADA BIT(3)
|
||||
#define RX8130_REG_FLAG 0x0d
|
||||
#define RX8130_REG_FLAG 0x1d
|
||||
#define RX8130_REG_FLAG_VLF BIT(1)
|
||||
#define RX8130_REG_FLAG_AF BIT(3)
|
||||
#define RX8130_REG_CONTROL0 0x0e
|
||||
#define RX8130_REG_CONTROL0 0x1e
|
||||
#define RX8130_REG_CONTROL0_AIE BIT(3)
|
||||
|
||||
#define MCP794XX_REG_CONTROL 0x07
|
||||
|
|
Loading…
Reference in a new issue