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ASoC: tlv320aic31xx: fix reversed bclk/wclk master bits
[ Upstream commit9cf76a72af
] These are backwards from Table 7-71 of the TLV320AIC3100 spec [1]. This was broken in12eb4d66ba
when BCLK_MASTER and WCLK_MASTER were converted from 0x08 and 0x04 to BIT(2) and BIT(3), respectively. -#define AIC31XX_BCLK_MASTER 0x08 -#define AIC31XX_WCLK_MASTER 0x04 +#define AIC31XX_BCLK_MASTER BIT(2) +#define AIC31XX_WCLK_MASTER BIT(3) Probably just a typo since the defines were not listed in bit order. [1] https://www.ti.com/lit/gpn/tlv320aic3100 Signed-off-by: Kyle Russell <bkylerussell@gmail.com> Link: https://lore.kernel.org/r/20210622010941.241386-1-bkylerussell@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 2 additions and 2 deletions
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@ -147,8 +147,8 @@ struct aic31xx_pdata {
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#define AIC31XX_WORD_LEN_24BITS 0x02
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#define AIC31XX_WORD_LEN_32BITS 0x03
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#define AIC31XX_IFACE1_MASTER_MASK GENMASK(3, 2)
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#define AIC31XX_BCLK_MASTER BIT(2)
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#define AIC31XX_WCLK_MASTER BIT(3)
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#define AIC31XX_BCLK_MASTER BIT(3)
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#define AIC31XX_WCLK_MASTER BIT(2)
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/* AIC31XX_DATA_OFFSET */
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#define AIC31XX_DATA_OFFSET_MASK GENMASK(7, 0)
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