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iio: bmc150: Use i2c regmap
This replaces all usage of direct i2c accesses with regmap accesses. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Irina Tirdea <irina.tirdea@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
parent
0f0796509c
commit
4011eda613
2 changed files with 99 additions and 128 deletions
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@ -22,6 +22,8 @@ config BMC150_ACCEL
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depends on I2C
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select IIO_BUFFER
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select IIO_TRIGGERED_BUFFER
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select REGMAP
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select REGMAP_I2C
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help
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Say yes here to build support for the following Bosch accelerometers:
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BMC150, BMI055, BMA250E, BMA222E, BMA255, BMA280.
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@ -35,6 +35,7 @@
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#include <linux/iio/trigger.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/regmap.h>
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#define BMC150_ACCEL_DRV_NAME "bmc150_accel"
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#define BMC150_ACCEL_IRQ_NAME "bmc150_accel_event"
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@ -185,6 +186,8 @@ enum bmc150_accel_trigger_id {
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struct bmc150_accel_data {
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struct i2c_client *client;
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struct regmap *regmap;
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struct device *dev;
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struct bmc150_accel_interrupt interrupts[BMC150_ACCEL_INTERRUPTS];
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atomic_t active_intr;
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struct bmc150_accel_trigger triggers[BMC150_ACCEL_TRIGGERS];
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@ -241,6 +244,12 @@ static const struct {
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{500000, BMC150_ACCEL_SLEEP_500_MS},
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{1000000, BMC150_ACCEL_SLEEP_1_SEC} };
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static const struct regmap_config bmc150_i2c_regmap_conf = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x3f,
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};
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static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
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enum bmc150_power_modes mode,
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int dur_us)
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@ -270,8 +279,7 @@ static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
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dev_dbg(&data->client->dev, "Set Mode bits %x\n", lpw_bits);
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ret = i2c_smbus_write_byte_data(data->client,
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BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
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ret = regmap_write(data->regmap, BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
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return ret;
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@ -289,8 +297,7 @@ static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
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for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
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if (bmc150_accel_samp_freq_table[i].val == val &&
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bmc150_accel_samp_freq_table[i].val2 == val2) {
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ret = i2c_smbus_write_byte_data(
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data->client,
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ret = regmap_write(data->regmap,
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BMC150_ACCEL_REG_PMU_BW,
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bmc150_accel_samp_freq_table[i].bw_bits);
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if (ret < 0)
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@ -307,26 +314,19 @@ static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
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static int bmc150_accel_update_slope(struct bmc150_accel_data *data)
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{
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int ret, val;
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int ret;
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ret = i2c_smbus_write_byte_data(data->client, BMC150_ACCEL_REG_INT_6,
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ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_6,
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data->slope_thres);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error writing reg_int_6\n");
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return ret;
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}
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ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
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ret = regmap_update_bits(data->regmap, BMC150_ACCEL_REG_INT_5,
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BMC150_ACCEL_SLOPE_DUR_MASK, data->slope_dur);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error reading reg_int_5\n");
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return ret;
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}
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val = (ret & ~BMC150_ACCEL_SLOPE_DUR_MASK) | data->slope_dur;
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ret = i2c_smbus_write_byte_data(data->client, BMC150_ACCEL_REG_INT_5,
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val);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error write reg_int_5\n");
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dev_err(&data->client->dev, "Error updating reg_int_5\n");
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return ret;
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}
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@ -469,38 +469,18 @@ static int bmc150_accel_set_interrupt(struct bmc150_accel_data *data, int i,
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return ret;
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/* map the interrupt to the appropriate pins */
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ret = i2c_smbus_read_byte_data(data->client, info->map_reg);
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ret = regmap_update_bits(data->regmap, info->map_reg, info->map_bitmask,
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(state ? info->map_bitmask : 0));
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if (ret < 0) {
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dev_err(&data->client->dev, "Error reading reg_int_map\n");
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goto out_fix_power_state;
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}
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if (state)
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ret |= info->map_bitmask;
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else
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ret &= ~info->map_bitmask;
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ret = i2c_smbus_write_byte_data(data->client, info->map_reg,
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ret);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error writing reg_int_map\n");
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dev_err(&data->client->dev, "Error updating reg_int_map\n");
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goto out_fix_power_state;
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}
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/* enable/disable the interrupt */
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ret = i2c_smbus_read_byte_data(data->client, info->en_reg);
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ret = regmap_update_bits(data->regmap, info->en_reg, info->en_bitmask,
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(state ? info->en_bitmask : 0));
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if (ret < 0) {
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dev_err(&data->client->dev, "Error reading reg_int_en\n");
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goto out_fix_power_state;
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}
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if (state)
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ret |= info->en_bitmask;
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else
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ret &= ~info->en_bitmask;
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ret = i2c_smbus_write_byte_data(data->client, info->en_reg, ret);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error writing reg_int_en\n");
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dev_err(&data->client->dev, "Error updating reg_int_en\n");
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goto out_fix_power_state;
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}
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@ -522,8 +502,7 @@ static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
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for (i = 0; i < ARRAY_SIZE(data->chip_info->scale_table); ++i) {
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if (data->chip_info->scale_table[i].scale == val) {
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ret = i2c_smbus_write_byte_data(
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data->client,
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ret = regmap_write(data->regmap,
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BMC150_ACCEL_REG_PMU_RANGE,
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data->chip_info->scale_table[i].reg_range);
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if (ret < 0) {
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@ -543,16 +522,17 @@ static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
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static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val)
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{
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int ret;
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unsigned int value;
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mutex_lock(&data->mutex);
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ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_TEMP);
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ret = regmap_read(data->regmap, BMC150_ACCEL_REG_TEMP, &value);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error reading reg_temp\n");
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mutex_unlock(&data->mutex);
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return ret;
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}
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*val = sign_extend32(ret, 7);
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*val = sign_extend32(value, 7);
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mutex_unlock(&data->mutex);
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@ -565,6 +545,7 @@ static int bmc150_accel_get_axis(struct bmc150_accel_data *data,
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{
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int ret;
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int axis = chan->scan_index;
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unsigned int raw_val;
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mutex_lock(&data->mutex);
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ret = bmc150_accel_set_power_state(data, true);
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@ -573,15 +554,15 @@ static int bmc150_accel_get_axis(struct bmc150_accel_data *data,
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return ret;
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}
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ret = i2c_smbus_read_word_data(data->client,
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BMC150_ACCEL_AXIS_TO_REG(axis));
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ret = regmap_bulk_read(data->regmap, BMC150_ACCEL_AXIS_TO_REG(axis),
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&raw_val, 2);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error reading axis %d\n", axis);
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bmc150_accel_set_power_state(data, false);
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mutex_unlock(&data->mutex);
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return ret;
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}
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*val = sign_extend32(ret >> chan->scan_type.shift,
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*val = sign_extend32(raw_val >> chan->scan_type.shift,
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chan->scan_type.realbits - 1);
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ret = bmc150_accel_set_power_state(data, false);
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mutex_unlock(&data->mutex);
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@ -845,52 +826,34 @@ static int bmc150_accel_set_watermark(struct iio_dev *indio_dev, unsigned val)
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* We must read at least one full frame in one burst, otherwise the rest of the
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* frame data is discarded.
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*/
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static int bmc150_accel_fifo_transfer(const struct i2c_client *client,
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static int bmc150_accel_fifo_transfer(struct bmc150_accel_data *data,
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char *buffer, int samples)
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{
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int sample_length = 3 * 2;
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u8 reg_fifo_data = BMC150_ACCEL_REG_FIFO_DATA;
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int ret = -EIO;
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int ret;
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int total_length = samples * sample_length;
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int i;
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size_t step = regmap_get_raw_read_max(data->regmap);
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if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
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struct i2c_msg msg[2] = {
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{
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.addr = client->addr,
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.flags = 0,
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.buf = ®_fifo_data,
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.len = sizeof(reg_fifo_data),
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},
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{
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.addr = client->addr,
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.flags = I2C_M_RD,
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.buf = (u8 *)buffer,
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.len = samples * sample_length,
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}
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};
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if (!step || step > total_length)
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step = total_length;
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else if (step < total_length)
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step = sample_length;
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ret = i2c_transfer(client->adapter, msg, 2);
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if (ret != 2)
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ret = -EIO;
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else
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ret = 0;
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} else {
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int i, step = I2C_SMBUS_BLOCK_MAX / sample_length;
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for (i = 0; i < samples * sample_length; i += step) {
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ret = i2c_smbus_read_i2c_block_data(client,
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reg_fifo_data, step,
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&buffer[i]);
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if (ret != step) {
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ret = -EIO;
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break;
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}
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ret = 0;
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}
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/*
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* Seems we have a bus with size limitation so we have to execute
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* multiple reads
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*/
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for (i = 0; i < total_length; i += step) {
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ret = regmap_raw_read(data->regmap, BMC150_ACCEL_REG_FIFO_DATA,
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&buffer[i], step);
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if (ret)
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break;
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}
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if (ret)
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dev_err(&client->dev, "Error transferring data from fifo\n");
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dev_err(data->dev, "Error transferring data from fifo in single steps of %zu\n",
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step);
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return ret;
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}
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@ -904,15 +867,15 @@ static int __bmc150_accel_fifo_flush(struct iio_dev *indio_dev,
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u16 buffer[BMC150_ACCEL_FIFO_LENGTH * 3];
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int64_t tstamp;
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uint64_t sample_period;
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unsigned int val;
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ret = i2c_smbus_read_byte_data(data->client,
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BMC150_ACCEL_REG_FIFO_STATUS);
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ret = regmap_read(data->regmap, BMC150_ACCEL_REG_FIFO_STATUS, &val);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error reading reg_fifo_status\n");
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return ret;
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}
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count = ret & 0x7F;
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count = val & 0x7F;
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if (!count)
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return 0;
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@ -951,7 +914,7 @@ static int __bmc150_accel_fifo_flush(struct iio_dev *indio_dev,
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if (samples && count > samples)
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count = samples;
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ret = bmc150_accel_fifo_transfer(data->client, (u8 *)buffer, count);
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ret = bmc150_accel_fifo_transfer(data, (u8 *)buffer, count);
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if (ret)
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return ret;
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@ -1154,17 +1117,19 @@ static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
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struct iio_dev *indio_dev = pf->indio_dev;
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struct bmc150_accel_data *data = iio_priv(indio_dev);
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int bit, ret, i = 0;
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unsigned int raw_val;
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mutex_lock(&data->mutex);
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for_each_set_bit(bit, indio_dev->active_scan_mask,
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indio_dev->masklength) {
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ret = i2c_smbus_read_word_data(data->client,
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BMC150_ACCEL_AXIS_TO_REG(bit));
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ret = regmap_bulk_read(data->regmap,
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BMC150_ACCEL_AXIS_TO_REG(bit), &raw_val,
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2);
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if (ret < 0) {
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mutex_unlock(&data->mutex);
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goto err_read;
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}
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data->buffer[i++] = ret;
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data->buffer[i++] = raw_val;
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}
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mutex_unlock(&data->mutex);
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@ -1188,10 +1153,9 @@ static int bmc150_accel_trig_try_reen(struct iio_trigger *trig)
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mutex_lock(&data->mutex);
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/* clear any latched interrupt */
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ret = i2c_smbus_write_byte_data(data->client,
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BMC150_ACCEL_REG_INT_RST_LATCH,
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BMC150_ACCEL_INT_MODE_LATCH_INT |
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BMC150_ACCEL_INT_MODE_LATCH_RESET);
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ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH,
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BMC150_ACCEL_INT_MODE_LATCH_INT |
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BMC150_ACCEL_INT_MODE_LATCH_RESET);
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mutex_unlock(&data->mutex);
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if (ret < 0) {
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dev_err(&data->client->dev,
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@ -1248,20 +1212,20 @@ static int bmc150_accel_handle_roc_event(struct iio_dev *indio_dev)
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struct bmc150_accel_data *data = iio_priv(indio_dev);
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int dir;
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int ret;
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unsigned int val;
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ret = i2c_smbus_read_byte_data(data->client,
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BMC150_ACCEL_REG_INT_STATUS_2);
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ret = regmap_read(data->regmap, BMC150_ACCEL_REG_INT_STATUS_2, &val);
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if (ret < 0) {
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dev_err(&data->client->dev, "Error reading reg_int_status_2\n");
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return ret;
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}
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if (ret & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
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if (val & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
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dir = IIO_EV_DIR_FALLING;
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else
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dir = IIO_EV_DIR_RISING;
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if (ret & BMC150_ACCEL_ANY_MOTION_BIT_X)
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if (val & BMC150_ACCEL_ANY_MOTION_BIT_X)
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iio_push_event(indio_dev,
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IIO_MOD_EVENT_CODE(IIO_ACCEL,
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0,
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@ -1270,7 +1234,7 @@ static int bmc150_accel_handle_roc_event(struct iio_dev *indio_dev)
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dir),
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data->timestamp);
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if (ret & BMC150_ACCEL_ANY_MOTION_BIT_Y)
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if (val & BMC150_ACCEL_ANY_MOTION_BIT_Y)
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iio_push_event(indio_dev,
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IIO_MOD_EVENT_CODE(IIO_ACCEL,
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0,
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@ -1279,7 +1243,7 @@ static int bmc150_accel_handle_roc_event(struct iio_dev *indio_dev)
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dir),
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data->timestamp);
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if (ret & BMC150_ACCEL_ANY_MOTION_BIT_Z)
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if (val & BMC150_ACCEL_ANY_MOTION_BIT_Z)
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iio_push_event(indio_dev,
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IIO_MOD_EVENT_CODE(IIO_ACCEL,
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0,
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@ -1314,10 +1278,9 @@ static irqreturn_t bmc150_accel_irq_thread_handler(int irq, void *private)
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}
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if (ack) {
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ret = i2c_smbus_write_byte_data(data->client,
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BMC150_ACCEL_REG_INT_RST_LATCH,
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BMC150_ACCEL_INT_MODE_LATCH_INT |
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BMC150_ACCEL_INT_MODE_LATCH_RESET);
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ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH,
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BMC150_ACCEL_INT_MODE_LATCH_INT |
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BMC150_ACCEL_INT_MODE_LATCH_RESET);
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if (ret)
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dev_err(&data->client->dev,
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"Error writing reg_int_rst_latch\n");
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@ -1432,7 +1395,7 @@ static int bmc150_accel_fifo_set_mode(struct bmc150_accel_data *data)
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|||
u8 reg = BMC150_ACCEL_REG_FIFO_CONFIG1;
|
||||
int ret;
|
||||
|
||||
ret = i2c_smbus_write_byte_data(data->client, reg, data->fifo_mode);
|
||||
ret = regmap_write(data->regmap, reg, data->fifo_mode);
|
||||
if (ret < 0) {
|
||||
dev_err(&data->client->dev, "Error writing reg_fifo_config1\n");
|
||||
return ret;
|
||||
|
@ -1441,9 +1404,8 @@ static int bmc150_accel_fifo_set_mode(struct bmc150_accel_data *data)
|
|||
if (!data->fifo_mode)
|
||||
return 0;
|
||||
|
||||
ret = i2c_smbus_write_byte_data(data->client,
|
||||
BMC150_ACCEL_REG_FIFO_CONFIG0,
|
||||
data->watermark);
|
||||
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_FIFO_CONFIG0,
|
||||
data->watermark);
|
||||
if (ret < 0)
|
||||
dev_err(&data->client->dev, "Error writing reg_fifo_config0\n");
|
||||
|
||||
|
@ -1530,23 +1492,25 @@ static const struct iio_buffer_setup_ops bmc150_accel_buffer_ops = {
|
|||
static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
|
||||
{
|
||||
int ret, i;
|
||||
unsigned int val;
|
||||
|
||||
ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_CHIP_ID);
|
||||
ret = regmap_read(data->regmap, BMC150_ACCEL_REG_CHIP_ID, &val);
|
||||
if (ret < 0) {
|
||||
dev_err(&data->client->dev, "Error: Reading chip id\n");
|
||||
dev_err(&data->client->dev,
|
||||
"Error: Reading chip id\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
|
||||
dev_dbg(&data->client->dev, "Chip Id %x\n", val);
|
||||
for (i = 0; i < ARRAY_SIZE(bmc150_accel_chip_info_tbl); i++) {
|
||||
if (bmc150_accel_chip_info_tbl[i].chip_id == ret) {
|
||||
if (bmc150_accel_chip_info_tbl[i].chip_id == val) {
|
||||
data->chip_info = &bmc150_accel_chip_info_tbl[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!data->chip_info) {
|
||||
dev_err(&data->client->dev, "Unsupported chip %x\n", ret);
|
||||
dev_err(&data->client->dev, "Invalid chip %x\n", val);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
|
@ -1560,11 +1524,11 @@ static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
|
|||
return ret;
|
||||
|
||||
/* Set Default Range */
|
||||
ret = i2c_smbus_write_byte_data(data->client,
|
||||
BMC150_ACCEL_REG_PMU_RANGE,
|
||||
BMC150_ACCEL_DEF_RANGE_4G);
|
||||
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_PMU_RANGE,
|
||||
BMC150_ACCEL_DEF_RANGE_4G);
|
||||
if (ret < 0) {
|
||||
dev_err(&data->client->dev, "Error writing reg_pmu_range\n");
|
||||
dev_err(&data->client->dev,
|
||||
"Error writing reg_pmu_range\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -1578,10 +1542,9 @@ static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
|
|||
return ret;
|
||||
|
||||
/* Set default as latched interrupts */
|
||||
ret = i2c_smbus_write_byte_data(data->client,
|
||||
BMC150_ACCEL_REG_INT_RST_LATCH,
|
||||
BMC150_ACCEL_INT_MODE_LATCH_INT |
|
||||
BMC150_ACCEL_INT_MODE_LATCH_RESET);
|
||||
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH,
|
||||
BMC150_ACCEL_INT_MODE_LATCH_INT |
|
||||
BMC150_ACCEL_INT_MODE_LATCH_RESET);
|
||||
if (ret < 0) {
|
||||
dev_err(&data->client->dev,
|
||||
"Error writing reg_int_rst_latch\n");
|
||||
|
@ -1606,6 +1569,13 @@ static int bmc150_accel_probe(struct i2c_client *client,
|
|||
data = iio_priv(indio_dev);
|
||||
i2c_set_clientdata(client, indio_dev);
|
||||
data->client = client;
|
||||
data->dev = &client->dev;
|
||||
|
||||
data->regmap = devm_regmap_init_i2c(client, &bmc150_i2c_regmap_conf);
|
||||
if (IS_ERR(data->regmap)) {
|
||||
dev_err(&client->dev, "Failed to initialize i2c regmap\n");
|
||||
return PTR_ERR(data->regmap);
|
||||
}
|
||||
|
||||
if (id)
|
||||
name = id->name;
|
||||
|
@ -1649,9 +1619,8 @@ static int bmc150_accel_probe(struct i2c_client *client,
|
|||
* want to use latch mode when we can to prevent interrupt
|
||||
* flooding.
|
||||
*/
|
||||
ret = i2c_smbus_write_byte_data(data->client,
|
||||
BMC150_ACCEL_REG_INT_RST_LATCH,
|
||||
BMC150_ACCEL_INT_MODE_LATCH_RESET);
|
||||
ret = regmap_write(data->regmap, BMC150_ACCEL_REG_INT_RST_LATCH,
|
||||
BMC150_ACCEL_INT_MODE_LATCH_RESET);
|
||||
if (ret < 0) {
|
||||
dev_err(&data->client->dev, "Error writing reg_int_rst_latch\n");
|
||||
goto err_buffer_cleanup;
|
||||
|
|
Loading…
Reference in a new issue