arm64: dts: microchip: align SPI NOR node name with dtschema

The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220407143223.295344-2-krzysztof.kozlowski@linaro.org
This commit is contained in:
Krzysztof Kozlowski 2022-04-07 16:32:23 +02:00
parent 65b96377bf
commit 402eb8ec54
4 changed files with 7 additions and 7 deletions

View File

@ -19,7 +19,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <14>; /* CS14 */
spi-flash@6 {
flash@6 {
compatible = "spi-nand";
pinctrl-0 = <&cs14_pins>;
pinctrl-names = "default";

View File

@ -47,7 +47,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* CS0 */
spi-flash@9 {
flash@9 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0x9>; /* SPI */
@ -59,7 +59,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <1>; /* CS1 */
spi-flash@9 {
flash@9 {
compatible = "spi-nand";
pinctrl-0 = <&cs1_pins>;
pinctrl-names = "default";

View File

@ -274,7 +274,7 @@
&spi0 {
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0>;
@ -289,7 +289,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* CS0 */
spi-flash@9 {
flash@9 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0x9>; /* SPI */

View File

@ -89,7 +89,7 @@
&spi0 {
status = "okay";
spi-flash@0 {
flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0>;
@ -104,7 +104,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* CS0 */
spi-flash@9 {
flash@9 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0x9>; /* SPI */