drivers: staging: media: omap4iss: Use BIT macro instead of left shifting

There is a BIT(nr) macro available in Linux Kernel,
which does the same thing.

Example:  1 << 7  is same as BIT(7)

Signed-off-by: Moses Christopher Bollavarapu <mosescb.dev@gmail.com>
Reviewed-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
This commit is contained in:
Moses Christopher Bollavarapu 2022-01-21 11:51:11 +01:00 committed by Hans Verkuil
parent 1069470070
commit 408a2a050f

View file

@ -53,19 +53,19 @@ enum iss_pipeline_stream_state {
enum iss_pipeline_state {
/* The stream has been started on the input video node. */
ISS_PIPELINE_STREAM_INPUT = 1,
ISS_PIPELINE_STREAM_INPUT = BIT(0),
/* The stream has been started on the output video node. */
ISS_PIPELINE_STREAM_OUTPUT = (1 << 1),
ISS_PIPELINE_STREAM_OUTPUT = BIT(1),
/* At least one buffer is queued on the input video node. */
ISS_PIPELINE_QUEUE_INPUT = (1 << 2),
ISS_PIPELINE_QUEUE_INPUT = BIT(2),
/* At least one buffer is queued on the output video node. */
ISS_PIPELINE_QUEUE_OUTPUT = (1 << 3),
ISS_PIPELINE_QUEUE_OUTPUT = BIT(3),
/* The input entity is idle, ready to be started. */
ISS_PIPELINE_IDLE_INPUT = (1 << 4),
ISS_PIPELINE_IDLE_INPUT = BIT(4),
/* The output entity is idle, ready to be started. */
ISS_PIPELINE_IDLE_OUTPUT = (1 << 5),
ISS_PIPELINE_IDLE_OUTPUT = BIT(5),
/* The pipeline is currently streaming. */
ISS_PIPELINE_STREAM = (1 << 6),
ISS_PIPELINE_STREAM = BIT(6),
};
/*
@ -126,9 +126,9 @@ struct iss_buffer {
enum iss_video_dmaqueue_flags {
/* Set if DMA queue becomes empty when ISS_PIPELINE_STREAM_CONTINUOUS */
ISS_VIDEO_DMAQUEUE_UNDERRUN = (1 << 0),
ISS_VIDEO_DMAQUEUE_UNDERRUN = BIT(0),
/* Set when queuing buffer to an empty DMA queue */
ISS_VIDEO_DMAQUEUE_QUEUED = (1 << 1),
ISS_VIDEO_DMAQUEUE_QUEUED = BIT(1),
};
#define iss_video_dmaqueue_flags_clr(video) \