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phy/rockchip: inno-hdmi: round fractal pixclock in rk3328 recalc_rate
[ Upstream commitd5ef343c1d
] inno_hdmi_phy_rk3328_clk_recalc_rate() is returning a rate not found in the pre pll config table when the fractal divider is used. This can prevent proper power_on because a tmdsclock for the new rate is not found in the pre pll config table. Fix this by saving and returning a rounded pixel rate that exist in the pre pll config table. Fixes:53706a1168
("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Zheng Yang <zhengyang@rock-chips.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-3-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 5 additions and 3 deletions
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@ -745,10 +745,12 @@ unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct clk_hw *hw,
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do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2));
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}
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inno->pixclock = vco;
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dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock);
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inno->pixclock = DIV_ROUND_CLOSEST((unsigned long)vco, 1000) * 1000;
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return vco;
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dev_dbg(inno->dev, "%s rate %lu vco %llu\n",
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__func__, inno->pixclock, vco);
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return inno->pixclock;
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}
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static long inno_hdmi_phy_rk3328_clk_round_rate(struct clk_hw *hw,
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