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net: mscc: ocelot: add ability to perform bulk reads

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Regmap supports bulk register reads. Ocelot does not. This patch adds
support for Ocelot to invoke bulk regmap reads. That will allow any driver
that performs consecutive reads over memory regions to optimize that
access.

Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Colin Foster 2022-02-13 11:12:53 -08:00 committed by David S. Miller
parent 65c53595bc
commit 40f3a5c815
2 changed files with 18 additions and 0 deletions
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13
drivers/net/ethernet/mscc/ocelot_io.c
View file

@ -10,6 +10,19 @@
#include "ocelot.h"
int __ocelot_bulk_read_ix(struct ocelot *ocelot, u32 reg, u32 offset, void *buf,
int count)
{
u16 target = reg >> TARGET_OFFSET;
WARN_ON(!target);
return regmap_bulk_read(ocelot->targets[target],
ocelot->map[target][reg & REG_MASK] + offset,
buf, count);
}
EXPORT_SYMBOL_GPL(__ocelot_bulk_read_ix);
u32 __ocelot_read_ix(struct ocelot *ocelot, u32 reg, u32 offset)
{
u16 target = reg >> TARGET_OFFSET;

5
include/soc/mscc/ocelot.h
View file

@ -742,6 +742,9 @@ struct ocelot_policer {
u32 burst; /* bytes */
};
#define ocelot_bulk_read_rix(ocelot, reg, ri, buf, count) \
__ocelot_bulk_read_ix(ocelot, reg, reg##_RSZ * (ri), buf, count)
#define ocelot_read_ix(ocelot, reg, gi, ri) \
__ocelot_read_ix(ocelot, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri))
#define ocelot_read_gix(ocelot, reg, gi) \
@ -798,6 +801,8 @@ struct ocelot_policer {
u32 ocelot_port_readl(struct ocelot_port *port, u32 reg);
void ocelot_port_writel(struct ocelot_port *port, u32 val, u32 reg);
void ocelot_port_rmwl(struct ocelot_port *port, u32 val, u32 mask, u32 reg);
int __ocelot_bulk_read_ix(struct ocelot *ocelot, u32 reg, u32 offset, void *buf,
int count);
u32 __ocelot_read_ix(struct ocelot *ocelot, u32 reg, u32 offset);
void __ocelot_write_ix(struct ocelot *ocelot, u32 val, u32 reg, u32 offset);
void __ocelot_rmw_ix(struct ocelot *ocelot, u32 val, u32 mask, u32 reg,