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drm/msm/dpu: drop now-unused mdss_irqs field from hw catalog
Now as the list of the interrupts is constructed from the catalog data, drop the mdss_irqs field from catalog. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/549659/ Link: https://lore.kernel.org/r/20230727144543.1483630-5-dmitry.baryshkov@linaro.org
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17 changed files with 0 additions and 135 deletions
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@ -342,14 +342,6 @@ const struct dpu_mdss_cfg dpu_msm8998_cfg = {
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.vbif_count = ARRAY_SIZE(msm8998_vbif),
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.vbif = msm8998_vbif,
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.perf = &msm8998_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF2_INTR) | \
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BIT(MDP_INTF3_INTR) | \
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BIT(MDP_INTF4_INTR),
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};
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#endif
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@ -359,15 +359,6 @@ const struct dpu_mdss_cfg dpu_sdm845_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sdm845_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF2_INTR) | \
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BIT(MDP_INTF3_INTR) | \
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BIT(MDP_AD4_0_INTR) | \
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BIT(MDP_AD4_1_INTR),
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};
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#endif
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@ -404,17 +404,6 @@ const struct dpu_mdss_cfg dpu_sm8150_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sm8150_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF1_TEAR_INTR) | \
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BIT(MDP_INTF2_INTR) | \
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BIT(MDP_INTF2_TEAR_INTR) | \
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BIT(MDP_INTF3_INTR) | \
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BIT(MDP_AD4_0_INTR) | \
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BIT(MDP_AD4_1_INTR),
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};
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#endif
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@ -431,19 +431,6 @@ const struct dpu_mdss_cfg dpu_sc8180x_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sc8180x_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF1_TEAR_INTR) | \
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BIT(MDP_INTF2_INTR) | \
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BIT(MDP_INTF2_TEAR_INTR) | \
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BIT(MDP_INTF3_INTR) | \
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BIT(MDP_INTF4_INTR) | \
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BIT(MDP_INTF5_INTR) | \
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BIT(MDP_AD4_0_INTR) | \
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BIT(MDP_AD4_1_INTR),
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};
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#endif
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@ -225,12 +225,6 @@ const struct dpu_mdss_cfg dpu_sm6125_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sm6125_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF1_TEAR_INTR),
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};
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#endif
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@ -421,16 +421,6 @@ const struct dpu_mdss_cfg dpu_sm8250_cfg = {
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.wb_count = ARRAY_SIZE(sm8250_wb),
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.wb = sm8250_wb,
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.perf = &sm8250_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF1_TEAR_INTR) | \
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BIT(MDP_INTF2_INTR) | \
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BIT(MDP_INTF2_TEAR_INTR) | \
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BIT(MDP_INTF3_INTR) | \
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BIT(MDP_INTF4_INTR),
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};
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#endif
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@ -231,12 +231,6 @@ const struct dpu_mdss_cfg dpu_sc7180_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sc7180_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF1_TEAR_INTR),
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};
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#endif
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@ -161,11 +161,6 @@ const struct dpu_mdss_cfg dpu_sm6115_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sm6115_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF1_TEAR_INTR),
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};
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#endif
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@ -234,12 +234,6 @@ const struct dpu_mdss_cfg dpu_sm6350_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sm6350_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF1_TEAR_INTR),
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};
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#endif
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@ -151,11 +151,6 @@ const struct dpu_mdss_cfg dpu_qcm2290_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &qcm2290_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF1_TEAR_INTR),
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};
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#endif
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@ -173,11 +173,6 @@ const struct dpu_mdss_cfg dpu_sm6375_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sm6375_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF1_INTR) | \
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BIT(MDP_INTF1_TEAR_INTR),
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};
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#endif
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@ -412,15 +412,6 @@ const struct dpu_mdss_cfg dpu_sm8350_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sm8350_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
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BIT(MDP_INTF2_7xxx_INTR) | \
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BIT(MDP_INTF2_7xxx_TEAR_INTR) | \
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BIT(MDP_INTF3_7xxx_INTR),
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};
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#endif
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@ -281,13 +281,6 @@ const struct dpu_mdss_cfg dpu_sc7280_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sc7280_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
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BIT(MDP_INTF5_7xxx_INTR),
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};
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#endif
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@ -474,20 +474,6 @@ const struct dpu_mdss_cfg dpu_sc8280xp_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sc8280xp_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
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BIT(MDP_INTF2_7xxx_INTR) | \
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BIT(MDP_INTF2_7xxx_TEAR_INTR) | \
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BIT(MDP_INTF3_7xxx_INTR) | \
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BIT(MDP_INTF4_7xxx_INTR) | \
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BIT(MDP_INTF5_7xxx_INTR) | \
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BIT(MDP_INTF6_7xxx_INTR) | \
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BIT(MDP_INTF7_7xxx_INTR) | \
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BIT(MDP_INTF8_7xxx_INTR),
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};
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#endif
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@ -435,15 +435,6 @@ const struct dpu_mdss_cfg dpu_sm8450_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sm8450_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
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BIT(MDP_INTF2_7xxx_INTR) | \
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BIT(MDP_INTF2_7xxx_TEAR_INTR) | \
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BIT(MDP_INTF3_7xxx_INTR),
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};
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#endif
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@ -449,15 +449,6 @@ const struct dpu_mdss_cfg dpu_sm8550_cfg = {
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.vbif_count = ARRAY_SIZE(sdm845_vbif),
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.vbif = sdm845_vbif,
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.perf = &sm8550_perf_data,
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.mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
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BIT(MDP_SSPP_TOP0_INTR2) | \
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BIT(MDP_SSPP_TOP0_HIST_INTR) | \
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BIT(MDP_INTF0_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_INTR) | \
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BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
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BIT(MDP_INTF2_7xxx_INTR) | \
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BIT(MDP_INTF2_7xxx_TEAR_INTR) | \
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BIT(MDP_INTF3_7xxx_INTR),
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};
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#endif
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@ -811,7 +811,6 @@ struct dpu_perf_cfg {
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* @dma_formats Supported formats for dma pipe
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* @cursor_formats Supported formats for cursor pipe
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* @vig_formats Supported formats for vig pipe
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* @mdss_irqs: Bitmap with the irqs supported by the target
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*/
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struct dpu_mdss_cfg {
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const struct dpu_mdss_version *mdss_ver;
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@ -860,8 +859,6 @@ struct dpu_mdss_cfg {
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const struct dpu_format_extended *dma_formats;
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const struct dpu_format_extended *cursor_formats;
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const struct dpu_format_extended *vig_formats;
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unsigned long mdss_irqs;
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};
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extern const struct dpu_mdss_cfg dpu_msm8998_cfg;
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