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drm/i915/gvt: Fix two CFL MMIO handling caused by regression.
commitfccd0f7cf4
upstream. D_CFL was incorrectly removed for: GAMT_CHKN_BIT_REG GEN9_CTX_PREEMPT_REG V2: Update commit message. V3: Rebase and split Fixes and mis-handled MMIO. Fixes:43226e6fe7
(drm/i915/gvt: replaced register address with name) Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Colin Xu <colin.xu@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20200601030638.16002-1-colin.xu@intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 2 additions and 2 deletions
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@ -3103,8 +3103,8 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
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MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
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NULL, NULL);
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MMIO_D(GAMT_CHKN_BIT_REG, D_KBL);
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MMIO_D(GEN9_CTX_PREEMPT_REG, D_KBL | D_SKL);
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MMIO_D(GAMT_CHKN_BIT_REG, D_KBL | D_CFL);
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MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS);
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return 0;
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}
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