clocksource/drivers/imx-sysctr: Drop use global variables

Clean up code to not use global variables and introduce sysctr_private
structure to prepare the support for i.MX95.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20240205-imx-sysctr-v4-2-ca5a6e1552e7@nxp.com
This commit is contained in:
Peng Fan 2024-02-05 11:17:58 +08:00 committed by Daniel Lezcano
parent 8ec11bd89e
commit 418062b548
1 changed files with 44 additions and 32 deletions

View File

@ -4,6 +4,7 @@
#include <linux/interrupt.h>
#include <linux/clockchips.h>
#include <linux/slab.h>
#include "timer-of.h"
@ -20,32 +21,39 @@
#define SYS_CTR_CLK_DIV 0x3
static void __iomem *sys_ctr_base __ro_after_init;
static u32 cmpcr __ro_after_init;
struct sysctr_private {
u32 cmpcr;
};
static void sysctr_timer_enable(bool enable)
static void sysctr_timer_enable(struct clock_event_device *evt, bool enable)
{
writel(enable ? cmpcr | SYS_CTR_EN : cmpcr, sys_ctr_base + CMPCR);
struct timer_of *to = to_timer_of(evt);
struct sysctr_private *priv = to->private_data;
void __iomem *base = timer_of_base(to);
writel(enable ? priv->cmpcr | SYS_CTR_EN : priv->cmpcr, base + CMPCR);
}
static void sysctr_irq_acknowledge(void)
static void sysctr_irq_acknowledge(struct clock_event_device *evt)
{
/*
* clear the enable bit(EN =0) will clear
* the status bit(ISTAT = 0), then the interrupt
* signal will be negated(acknowledged).
*/
sysctr_timer_enable(false);
sysctr_timer_enable(evt, false);
}
static inline u64 sysctr_read_counter(void)
static inline u64 sysctr_read_counter(struct clock_event_device *evt)
{
struct timer_of *to = to_timer_of(evt);
void __iomem *base = timer_of_base(to);
u32 cnt_hi, tmp_hi, cnt_lo;
do {
cnt_hi = readl_relaxed(sys_ctr_base + CNTCV_HI);
cnt_lo = readl_relaxed(sys_ctr_base + CNTCV_LO);
tmp_hi = readl_relaxed(sys_ctr_base + CNTCV_HI);
cnt_hi = readl_relaxed(base + CNTCV_HI);
cnt_lo = readl_relaxed(base + CNTCV_LO);
tmp_hi = readl_relaxed(base + CNTCV_HI);
} while (tmp_hi != cnt_hi);
return ((u64) cnt_hi << 32) | cnt_lo;
@ -54,22 +62,24 @@ static inline u64 sysctr_read_counter(void)
static int sysctr_set_next_event(unsigned long delta,
struct clock_event_device *evt)
{
struct timer_of *to = to_timer_of(evt);
void __iomem *base = timer_of_base(to);
u32 cmp_hi, cmp_lo;
u64 next;
sysctr_timer_enable(false);
sysctr_timer_enable(evt, false);
next = sysctr_read_counter();
next = sysctr_read_counter(evt);
next += delta;
cmp_hi = (next >> 32) & 0x00fffff;
cmp_lo = next & 0xffffffff;
writel_relaxed(cmp_hi, sys_ctr_base + CMPCV_HI);
writel_relaxed(cmp_lo, sys_ctr_base + CMPCV_LO);
writel_relaxed(cmp_hi, base + CMPCV_HI);
writel_relaxed(cmp_lo, base + CMPCV_LO);
sysctr_timer_enable(true);
sysctr_timer_enable(evt, true);
return 0;
}
@ -81,7 +91,7 @@ static int sysctr_set_state_oneshot(struct clock_event_device *evt)
static int sysctr_set_state_shutdown(struct clock_event_device *evt)
{
sysctr_timer_enable(false);
sysctr_timer_enable(evt, false);
return 0;
}
@ -90,7 +100,7 @@ static irqreturn_t sysctr_timer_interrupt(int irq, void *dev_id)
{
struct clock_event_device *evt = dev_id;
sysctr_irq_acknowledge();
sysctr_irq_acknowledge(evt);
evt->event_handler(evt);
@ -117,34 +127,36 @@ static struct timer_of to_sysctr = {
},
};
static void __init sysctr_clockevent_init(void)
{
to_sysctr.clkevt.cpumask = cpu_possible_mask;
clockevents_config_and_register(&to_sysctr.clkevt,
timer_of_rate(&to_sysctr),
0xff, 0x7fffffff);
}
static int __init sysctr_timer_init(struct device_node *np)
{
int ret = 0;
struct sysctr_private *priv;
void __iomem *base;
int ret;
priv = kzalloc(sizeof(struct sysctr_private), GFP_KERNEL);
if (!priv)
return -ENOMEM;
ret = timer_of_init(np, &to_sysctr);
if (ret)
if (ret) {
kfree(priv);
return ret;
}
if (!of_property_read_bool(np, "nxp,no-divider")) {
/* system counter clock is divided by 3 internally */
to_sysctr.of_clk.rate /= SYS_CTR_CLK_DIV;
}
sys_ctr_base = timer_of_base(&to_sysctr);
cmpcr = readl(sys_ctr_base + CMPCR);
cmpcr &= ~SYS_CTR_EN;
to_sysctr.clkevt.cpumask = cpu_possible_mask;
to_sysctr.private_data = priv;
sysctr_clockevent_init();
base = timer_of_base(&to_sysctr);
priv->cmpcr = readl(base + CMPCR) & ~SYS_CTR_EN;
clockevents_config_and_register(&to_sysctr.clkevt,
timer_of_rate(&to_sysctr),
0xff, 0x7fffffff);
return 0;
}
TIMER_OF_DECLARE(sysctr_timer, "nxp,sysctr-timer", sysctr_timer_init);