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arm64: dts: qcom: rb5: Enable PCIe ports and PHY
RB5 has 3 PCIe ports exposed to connect PCIe client devices. PCIe0 is connected to QCA6391 chipset and others are available on the HS3 expansion connector. Hence, enable all of them. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210127234221.947306-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -655,6 +655,48 @@ wifi-therm@1 {
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};
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};
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&pcie0 {
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status = "okay";
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perst-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>;
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wake-gpio = <&tlmm 81 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_default_state>;
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};
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&pcie0_phy {
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status = "okay";
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vdda-phy-supply = <&vreg_l5a_0p88>;
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vdda-pll-supply = <&vreg_l9a_1p2>;
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};
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&pcie1 {
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status = "okay";
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perst-gpio = <&tlmm 82 GPIO_ACTIVE_LOW>;
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wake-gpio = <&tlmm 84 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie1_default_state>;
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};
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&pcie1_phy {
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status = "okay";
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vdda-phy-supply = <&vreg_l5a_0p88>;
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vdda-pll-supply = <&vreg_l9a_1p2>;
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};
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&pcie2 {
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status = "okay";
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perst-gpio = <&tlmm 85 GPIO_ACTIVE_LOW>;
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wake-gpio = <&tlmm 87 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2_default_state>;
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};
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&pcie2_phy {
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status = "okay";
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vdda-phy-supply = <&vreg_l5a_0p88>;
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vdda-pll-supply = <&vreg_l9a_1p2>;
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};
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&pm8150_gpios {
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gpio-reserved-ranges = <1 1>, <3 2>, <7 1>;
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gpio-line-names =
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@ -1125,6 +1167,81 @@ lt9611_irq_pin: lt9611-irq {
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bias-disable;
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};
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pcie0_default_state: pcie0-default {
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clkreq {
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pins = "gpio80";
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function = "pci_e0";
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bias-pull-up;
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};
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reset-n {
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pins = "gpio79";
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function = "gpio";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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wake-n {
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pins = "gpio81";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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pcie1_default_state: pcie1-default {
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clkreq {
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pins = "gpio83";
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function = "pci_e1";
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bias-pull-up;
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};
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reset-n {
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pins = "gpio82";
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function = "gpio";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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wake-n {
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pins = "gpio84";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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pcie2_default_state: pcie2-default {
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clkreq {
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pins = "gpio86";
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function = "pci_e2";
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bias-pull-up;
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};
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reset-n {
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pins = "gpio85";
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function = "gpio";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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wake-n {
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pins = "gpio87";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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sdc2_default_state: sdc2-default {
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clk {
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pins = "sdc2_clk";
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