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x86: use u32 for some lapic functions
Use u32 so 32 and 64bit have the same interface. Andrew Morton: xen, lguest build fixes Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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3c6bb07ac1
commit
42e0a9aa5d
6 changed files with 22 additions and 24 deletions
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@ -135,9 +135,9 @@ void apic_wait_icr_idle(void)
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cpu_relax();
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}
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unsigned long safe_apic_wait_icr_idle(void)
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u32 safe_apic_wait_icr_idle(void)
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{
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unsigned long send_status;
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u32 send_status;
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int timeout;
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timeout = 0;
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@ -788,11 +788,11 @@ static void lguest_wbinvd(void)
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* code qualifies for Advanced. It will also never interrupt anything. It
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* does, however, allow us to get through the Linux boot code. */
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#ifdef CONFIG_X86_LOCAL_APIC
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static void lguest_apic_write(unsigned long reg, unsigned long v)
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static void lguest_apic_write(unsigned long reg, u32 v)
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{
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}
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static unsigned long lguest_apic_read(unsigned long reg)
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static u32 lguest_apic_read(unsigned long reg)
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{
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return 0;
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}
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@ -521,12 +521,12 @@ static void xen_io_delay(void)
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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static unsigned long xen_apic_read(unsigned long reg)
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static u32 xen_apic_read(unsigned long reg)
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{
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return 0;
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}
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static void xen_apic_write(unsigned long reg, unsigned long val)
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static void xen_apic_write(unsigned long reg, u32 val)
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{
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/* Warn to see if there's any stray references */
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WARN_ON(1);
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@ -51,25 +51,23 @@ extern int local_apic_timer_disabled;
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#define setup_secondary_clock setup_secondary_APIC_clock
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#endif
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static __inline fastcall void native_apic_write(unsigned long reg,
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unsigned long v)
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static __inline fastcall void native_apic_write(unsigned long reg, u32 v)
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{
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*((volatile unsigned long *)(APIC_BASE+reg)) = v;
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*((volatile u32 *)(APIC_BASE + reg)) = v;
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}
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static __inline fastcall void native_apic_write_atomic(unsigned long reg,
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unsigned long v)
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static __inline fastcall void native_apic_write_atomic(unsigned long reg, u32 v)
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{
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xchg((volatile unsigned long *)(APIC_BASE+reg), v);
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(void) xchg((u32 *)(APIC_BASE + reg), v);
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}
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static __inline fastcall unsigned long native_apic_read(unsigned long reg)
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static __inline fastcall u32 native_apic_read(unsigned long reg)
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{
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return *((volatile unsigned long *)(APIC_BASE+reg));
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return *((volatile u32 *)(APIC_BASE + reg));
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}
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extern void apic_wait_icr_idle(void);
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extern unsigned long safe_apic_wait_icr_idle(void);
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extern u32 safe_apic_wait_icr_idle(void);
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extern int get_physical_broadcast(void);
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#ifdef CONFIG_X86_GOOD_APIC
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@ -38,14 +38,14 @@ struct pt_regs;
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* Basic functions accessing APICs.
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*/
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static __inline void apic_write(unsigned long reg, unsigned int v)
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static __inline void apic_write(unsigned long reg, u32 v)
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{
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*((volatile unsigned int *)(APIC_BASE+reg)) = v;
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}
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static __inline unsigned int apic_read(unsigned long reg)
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static __inline u32 apic_read(unsigned long reg)
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{
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return *((volatile unsigned int *)(APIC_BASE+reg));
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return *((volatile u32 *)(APIC_BASE+reg));
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}
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extern void apic_wait_icr_idle(void);
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@ -150,9 +150,9 @@ struct pv_apic_ops {
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* Direct APIC operations, principally for VMI. Ideally
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* these shouldn't be in this interface.
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*/
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void (*apic_write)(unsigned long reg, unsigned long v);
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void (*apic_write_atomic)(unsigned long reg, unsigned long v);
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unsigned long (*apic_read)(unsigned long reg);
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void (*apic_write)(unsigned long reg, u32 v);
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void (*apic_write_atomic)(unsigned long reg, u32 v);
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u32 (*apic_read)(unsigned long reg);
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void (*setup_boot_clock)(void);
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void (*setup_secondary_clock)(void);
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@ -690,17 +690,17 @@ static inline void slow_down_io(void) {
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/*
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* Basic functions accessing APICs.
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*/
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static inline void apic_write(unsigned long reg, unsigned long v)
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static inline void apic_write(unsigned long reg, u32 v)
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{
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PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
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}
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static inline void apic_write_atomic(unsigned long reg, unsigned long v)
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static inline void apic_write_atomic(unsigned long reg, u32 v)
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{
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PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
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}
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static inline unsigned long apic_read(unsigned long reg)
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static inline u32 apic_read(unsigned long reg)
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{
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return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
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}
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