dt-bindings: display: Drop unneeded quotes
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Miguel Ojeda <ojeda@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #display/msm Link: https://lore.kernel.org/r/20230320233823.2919475-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Rob Herring
parent
14aed8ea48
commit
4334aec07a
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@ -10,7 +10,7 @@ maintainers:
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- Robin van der Gracht <robin@protonic.nl>
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allOf:
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- $ref: "/schemas/input/matrix-keymap.yaml#"
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- $ref: /schemas/input/matrix-keymap.yaml#
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properties:
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compatible:
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@ -2,8 +2,8 @@
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# Copyright 2019 BayLibre, SAS
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
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@ -2,8 +2,8 @@
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# Copyright 2019 BayLibre, SAS
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic Meson Display Controller
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@ -2,8 +2,8 @@
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# Copyright 2019 Analogix Semiconductor, Inc.
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analogix ANX7625 SlimPort (4K Mobile HD Transmitter)
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@ -1,8 +1,8 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence MHDP8546 bridge
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@ -18,7 +18,7 @@ properties:
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maxItems: 1
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edid-emulation:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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The EDID emulation entry to use
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Value Resolution Description
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@ -23,7 +23,7 @@ properties:
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i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins
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clock-names:
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const: "ref"
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const: ref
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clocks:
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maxItems: 1
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@ -26,7 +26,7 @@ description:
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properties:
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$nodename:
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const: "aux-bus"
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const: aux-bus
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panel:
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$ref: panel/panel-common.yaml#
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@ -2,8 +2,8 @@
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# Copyright 2019 NXP
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: iMX8MQ Display Controller Subsystem (DCSS)
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@ -50,7 +50,7 @@ properties:
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- const: hdmi
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mediatek,syscon-hdmi:
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$ref: '/schemas/types.yaml#/definitions/phandle-array'
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to system configuration registers
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@ -74,7 +74,7 @@ properties:
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syscon-sfpb:
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description: A phandle to mmss_sfpb syscon node (only for DSIv2).
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$ref: "/schemas/types.yaml#/definitions/phandle"
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$ref: /schemas/types.yaml#/definitions/phandle
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qcom,dual-dsi-mode:
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type: boolean
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@ -105,14 +105,14 @@ properties:
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type: object
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ports:
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$ref: "/schemas/graph.yaml#/properties/ports"
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$ref: /schemas/graph.yaml#/properties/ports
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description: |
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Contains DSI controller input and output ports as children, each
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containing one endpoint subnode.
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properties:
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port@0:
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$ref: "/schemas/graph.yaml#/$defs/port-base"
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: |
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Input endpoints of the controller.
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@ -128,7 +128,7 @@ properties:
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enum: [ 0, 1, 2, 3 ]
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port@1:
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$ref: "/schemas/graph.yaml#/$defs/port-base"
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: |
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Output endpoints of the controller.
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@ -58,7 +58,7 @@ properties:
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maximum: 31
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qcom,phy-drive-ldo-level:
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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The PHY LDO has an amplitude tuning feature to adjust the LDO output
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for the HSTX drive. Use supported levels (mV) to offset the drive level
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@ -3,8 +3,8 @@
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/msm/gmu.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/display/msm/gmu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: GMU attached to certain Adreno GPUs
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@ -2,8 +2,8 @@
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/msm/gpu.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/display/msm/gpu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Adreno or Snapdragon GPUs
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@ -1,8 +1,8 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/msm/mdp4.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/display/msm/mdp4.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Adreno/Snapdragon MDP4 display controller
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@ -37,7 +37,7 @@ properties:
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backlight:
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description: Backlight used by the panel
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$ref: "/schemas/types.yaml#/definitions/phandle"
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$ref: /schemas/types.yaml#/definitions/phandle
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required:
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- compatible
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@ -76,7 +76,7 @@ properties:
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unevaluatedProperties: false
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renesas,cmms:
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$ref: "/schemas/types.yaml#/definitions/phandle-array"
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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maxItems: 1
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description:
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@ -84,7 +84,7 @@ properties:
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available DU channel.
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renesas,vsps:
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$ref: "/schemas/types.yaml#/definitions/phandle-array"
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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items:
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- description: phandle to VSP instance that serves the DU channel
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@ -38,7 +38,7 @@ properties:
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description: The number of cells in a MIPI calibration specifier.
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Should be 1. The single cell specifies a bitmask of the pads that
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need to be calibrated for a given device.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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const: 1
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additionalProperties: false
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# Tegra186 and later
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nvidia,interface:
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description: index of the SOR interface
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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nvidia,ddc-i2c-bus:
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description: phandle of an I2C controller used for DDC EDID
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probing
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$ref: "/schemas/types.yaml#/definitions/phandle"
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$ref: /schemas/types.yaml#/definitions/phandle
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nvidia,hpd-gpio:
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description: specifies a GPIO used for hotplug detection
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@ -82,23 +82,23 @@ properties:
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nvidia,edid:
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description: supplies a binary EDID blob
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$ref: "/schemas/types.yaml#/definitions/uint8-array"
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$ref: /schemas/types.yaml#/definitions/uint8-array
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nvidia,panel:
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description: phandle of a display panel, required for eDP
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$ref: "/schemas/types.yaml#/definitions/phandle"
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$ref: /schemas/types.yaml#/definitions/phandle
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nvidia,xbar-cfg:
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description: 5 cells containing the crossbar configuration.
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Each lane of the SOR, identified by the cell's index, is
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mapped via the crossbar to the pad specified by the cell's
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value.
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$ref: "/schemas/types.yaml#/definitions/uint32-array"
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$ref: /schemas/types.yaml#/definitions/uint32-array
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# optional when driving an eDP output
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nvidia,dpaux:
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description: phandle to a DispayPort AUX interface
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$ref: "/schemas/types.yaml#/definitions/phandle"
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$ref: /schemas/types.yaml#/definitions/phandle
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allOf:
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- if:
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|
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@ -60,13 +60,13 @@ properties:
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nvidia,outputs:
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description: A list of phandles of outputs that this display
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controller can drive.
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$ref: "/schemas/types.yaml#/definitions/phandle-array"
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$ref: /schemas/types.yaml#/definitions/phandle-array
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nvidia,head:
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description: The number of the display controller head. This
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is used to setup the various types of output to receive
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video data from the given head.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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$ref: /schemas/types.yaml#/definitions/uint32
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additionalProperties: false
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|
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@ -29,7 +29,7 @@ properties:
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- const: dsi
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allOf:
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- $ref: "/schemas/reset/reset.yaml"
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- $ref: /schemas/reset/reset.yaml
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additionalProperties: false
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|
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@ -59,12 +59,12 @@ properties:
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description: Should contain a phandle and a specifier specifying
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which pads are used by this DSI output and need to be
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calibrated. See nvidia,tegra114-mipi.yaml for details.
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$ref: "/schemas/types.yaml#/definitions/phandle-array"
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$ref: /schemas/types.yaml#/definitions/phandle-array
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nvidia,ddc-i2c-bus:
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description: phandle of an I2C controller used for DDC EDID
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probing
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$ref: "/schemas/types.yaml#/definitions/phandle"
|
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$ref: /schemas/types.yaml#/definitions/phandle
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nvidia,hpd-gpio:
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description: specifies a GPIO used for hotplug detection
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@ -72,19 +72,19 @@ properties:
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nvidia,edid:
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description: supplies a binary EDID blob
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$ref: "/schemas/types.yaml#/definitions/uint8-array"
|
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$ref: /schemas/types.yaml#/definitions/uint8-array
|
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nvidia,panel:
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description: phandle of a display panel
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$ref: "/schemas/types.yaml#/definitions/phandle"
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$ref: /schemas/types.yaml#/definitions/phandle
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nvidia,ganged-mode:
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description: contains a phandle to a second DSI controller to
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gang up with in order to support up to 8 data lanes
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$ref: "/schemas/types.yaml#/definitions/phandle"
|
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$ref: /schemas/types.yaml#/definitions/phandle
|
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|
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allOf:
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- $ref: "../dsi-controller.yaml#"
|
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- $ref: ../dsi-controller.yaml#
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- if:
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properties:
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compatible:
|
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|
|
|
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|
|
@ -68,7 +68,7 @@ properties:
|
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nvidia,ddc-i2c-bus:
|
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description: phandle of an I2C controller used for DDC EDID
|
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probing
|
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$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
nvidia,hpd-gpio:
|
||||
description: specifies a GPIO used for hotplug detection
|
||||
|
|
@ -76,11 +76,11 @@ properties:
|
|||
|
||||
nvidia,edid:
|
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description: supplies a binary EDID blob
|
||||
$ref: "/schemas/types.yaml#/definitions/uint8-array"
|
||||
$ref: /schemas/types.yaml#/definitions/uint8-array
|
||||
|
||||
nvidia,panel:
|
||||
description: phandle of a display panel
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
"#sound-dai-cells":
|
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const: 0
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
# Copyright 2019 Texas Instruments Incorporated
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments AM65x Display Subsystem
|
||||
|
||||
|
|
@ -88,7 +88,7 @@ properties:
|
|||
The DSS DPI output port node from video port 2
|
||||
|
||||
ti,am65x-oldi-io-ctrl:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
phandle to syscon device node mapping OLDI IO_CTRL registers.
|
||||
The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
# Copyright 2019 Texas Instruments Incorporated
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments J721E Display Subsystem
|
||||
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
# Copyright 2019 Texas Instruments Incorporated
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments K2G Display Subsystem
|
||||
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
# Copyright 2019 Bootlin
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
$id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Xylon LogiCVC display controller
|
||||
|
||||
|
|
@ -89,25 +89,25 @@ properties:
|
|||
description: Display output colorspace (C_DISPLAY_COLOR_SPACE).
|
||||
|
||||
xylon,display-depth:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Display output depth (C_PIXEL_DATA_WIDTH).
|
||||
|
||||
xylon,row-stride:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Fixed number of pixels in a framebuffer row (C_ROW_STRIDE).
|
||||
|
||||
xylon,dithering:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: Dithering module is enabled (C_XCOLOR)
|
||||
|
||||
xylon,background-layer:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: |
|
||||
The last layer is used to display a black background (C_USE_BACKGROUND).
|
||||
The layer must still be registered.
|
||||
|
||||
xylon,layers-configurable:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: |
|
||||
Configuration of layers' size, position and offset is enabled
|
||||
(C_USE_SIZE_POSITION).
|
||||
|
|
@ -131,7 +131,7 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
xylon,layer-depth:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Layer depth (C_LAYER_X_DATA_WIDTH).
|
||||
|
||||
xylon,layer-colorspace:
|
||||
|
|
@ -151,19 +151,19 @@ properties:
|
|||
description: Alpha mode for the layer (C_LAYER_X_ALPHA_MODE).
|
||||
|
||||
xylon,layer-base-offset:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
Offset in number of lines (C_LAYER_X_OFFSET) starting from the
|
||||
video RAM base (C_VMEM_BASEADDR), only for version 3.
|
||||
|
||||
xylon,layer-buffer-offset:
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
Offset in number of lines (C_BUFFER_*_OFFSET) starting from the
|
||||
layer base offset for the second buffer used in double-buffering.
|
||||
|
||||
xylon,layer-primary:
|
||||
$ref: "/schemas/types.yaml#/definitions/flag"
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: |
|
||||
Layer should be registered as a primary plane (exactly one is
|
||||
required).
|
||||
|
|
|
|||
Loading…
Reference in New Issue