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MIPS: Alchemy: Drop MIRAGE/BOSPORUS board support
No test hardware and no (apparent) users. These boards seem very similar to the DB1500, so if required support can be brought back again (I have datasheets) but then with dedicated board code, not tacked on to DB1000 support. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2864/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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3f724080a3
commit
435037c630
6 changed files with 3 additions and 203 deletions
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@ -22,13 +22,6 @@ config MIPS_MTX1
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_HAS_EARLY_PRINTK
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config MIPS_BOSPORUS
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bool "Alchemy Bosporus board"
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select ALCHEMY_GPIOINT_AU1000
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select DMA_NONCOHERENT
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_HAS_EARLY_PRINTK
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config MIPS_DB1000
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bool "Alchemy DB1000 board"
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select ALCHEMY_GPIOINT_AU1000
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@ -71,13 +64,6 @@ config MIPS_DB1550
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_HAS_EARLY_PRINTK
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config MIPS_MIRAGE
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bool "Alchemy Mirage board"
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select DMA_NONCOHERENT
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select ALCHEMY_GPIOINT_AU1000
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_HAS_EARLY_PRINTK
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config MIPS_PB1100
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bool "Alchemy PB1100 board"
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select ALCHEMY_GPIOINT_AU1000
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@ -67,20 +67,6 @@ platform-$(CONFIG_MIPS_DB1200) += alchemy/devboards/
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cflags-$(CONFIG_MIPS_DB1200) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
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load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
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#
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# AMD Alchemy Bosporus eval board
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#
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platform-$(CONFIG_MIPS_BOSPORUS) += alchemy/devboards/
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cflags-$(CONFIG_MIPS_BOSPORUS) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
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load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
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#
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# AMD Alchemy Mirage eval board
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#
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platform-$(CONFIG_MIPS_MIRAGE) += alchemy/devboards/
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cflags-$(CONFIG_MIPS_MIRAGE) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
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load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
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#
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# 4G-Systems eval board
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#
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@ -13,5 +13,3 @@ obj-$(CONFIG_MIPS_DB1100) += db1x00/
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obj-$(CONFIG_MIPS_DB1200) += db1200/
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obj-$(CONFIG_MIPS_DB1500) += db1x00/
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obj-$(CONFIG_MIPS_DB1550) += db1x00/
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obj-$(CONFIG_MIPS_BOSPORUS) += db1x00/
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obj-$(CONFIG_MIPS_MIRAGE) += db1x00/
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@ -40,64 +40,10 @@
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#include <prom.h>
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#ifdef CONFIG_MIPS_BOSPORUS
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char irq_tab_alchemy[][5] __initdata = {
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[11] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 11 - miniPCI */
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[12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - SN1741 */
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[13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */
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};
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/*
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* Micrel/Kendin 5 port switch attached to MAC0,
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* MAC0 is associated with PHY address 5 (== WAN port)
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* MAC1 is not associated with any PHY, since it's connected directly
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* to the switch.
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* no interrupts are used
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*/
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static struct au1000_eth_platform_data eth0_pdata = {
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.phy_static_config = 1,
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.phy_addr = 5,
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};
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static void bosporus_power_off(void)
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{
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while (1)
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asm volatile (".set mips3 ; wait ; .set mips0");
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}
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const char *get_system_type(void)
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{
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return "Alchemy Bosporus Gateway Reference";
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}
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#endif
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#ifdef CONFIG_MIPS_MIRAGE
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static void mirage_power_off(void)
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{
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alchemy_gpio_direction_output(210, 1);
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}
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const char *get_system_type(void)
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{
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return "Alchemy Mirage";
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}
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#endif
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#if defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE)
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static void mips_softreset(void)
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{
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asm volatile ("jr\t%0" : : "r"(0xbfc00000));
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}
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#else
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const char *get_system_type(void)
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{
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return "Alchemy Db1x00";
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}
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#endif
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void __init board_setup(void)
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@ -116,14 +62,6 @@ void __init board_setup(void)
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#ifdef CONFIG_MIPS_DB1100
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printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
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#endif
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#ifdef CONFIG_MIPS_BOSPORUS
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au1xxx_override_eth_cfg(0, ð0_pdata);
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printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
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#endif
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#ifdef CONFIG_MIPS_MIRAGE
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printk(KERN_INFO "AMD Alchemy Mirage Board\n");
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#endif
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#ifdef CONFIG_MIPS_DB1550
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printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
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@ -150,52 +88,11 @@ void __init board_setup(void)
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/* Enable GPIO[31:0] inputs */
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alchemy_gpio1_input_enable();
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#ifdef CONFIG_MIPS_MIRAGE
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{
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u32 pin_func;
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/* GPIO[20] is output */
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alchemy_gpio_direction_output(20, 0);
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/* Set GPIO[210:208] instead of SSI_0 */
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pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
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/* Set GPIO[215:211] for LEDs */
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pin_func |= 5 << 2;
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/* Set GPIO[214:213] for more LEDs */
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pin_func |= 5 << 12;
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/* Set GPIO[207:200] instead of PCMCIA/LCD */
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pin_func |= SYS_PF_LCD | SYS_PF_PC;
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au_writel(pin_func, SYS_PINFUNC);
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/*
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* Enable speaker amplifier. This should
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* be part of the audio driver.
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*/
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alchemy_gpio_direction_output(209, 1);
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pm_power_off = mirage_power_off;
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_machine_halt = mirage_power_off;
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_machine_restart = (void(*)(char *))mips_softreset;
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}
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#endif
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#ifdef CONFIG_MIPS_BOSPORUS
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pm_power_off = bosporus_power_off;
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_machine_halt = bosporus_power_off;
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_machine_restart = (void(*)(char *))mips_softreset;
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#endif
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au_sync();
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}
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static int __init db1x00_init_irq(void)
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{
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#if defined(CONFIG_MIPS_MIRAGE)
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irq_set_irq_type(AU1500_GPIO7_INT, IRQF_TRIGGER_RISING); /* TS pendown */
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#elif defined(CONFIG_MIPS_DB1550)
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#if defined(CONFIG_MIPS_DB1550)
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irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
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irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); /* CD1# */
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irq_set_irq_type(AU1550_GPIO3_INT, IRQF_TRIGGER_LOW); /* CARD0# */
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@ -37,7 +37,6 @@ struct pci_dev;
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* Db1550: 0/1, 21/22, 3/5
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*/
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#define DB1XXX_HAS_PCMCIA
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#define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
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#if defined(CONFIG_MIPS_DB1000)
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@ -48,7 +47,6 @@ struct pci_dev;
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#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT
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#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT
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#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
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#define BOARD_FLASH_WIDTH 4 /* 32-bits */
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#elif defined(CONFIG_MIPS_DB1100)
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#define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT
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#define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT
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@ -57,7 +55,6 @@ struct pci_dev;
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#define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT
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#define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT
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#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
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#define BOARD_FLASH_WIDTH 4 /* 32-bits */
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#elif defined(CONFIG_MIPS_DB1500)
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#define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT
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#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT
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#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT
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#define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT
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#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
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#define BOARD_FLASH_WIDTH 4 /* 32-bits */
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#elif defined(CONFIG_MIPS_DB1550)
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#define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT
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#define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT
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#define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT
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#define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT
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#define BOARD_FLASH_SIZE 0x08000000 /* 128MB */
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#define BOARD_FLASH_WIDTH 4 /* 32-bits */
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#else
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/* other board: no PCMCIA */
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#undef DB1XXX_HAS_PCMCIA
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#undef F_SWAPPED
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#define F_SWAPPED 0
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#if defined(CONFIG_MIPS_BOSPORUS)
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#define BOARD_FLASH_SIZE 0x01000000 /* 16MB */
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#define BOARD_FLASH_WIDTH 2 /* 16-bits */
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#elif defined(CONFIG_MIPS_MIRAGE)
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#define BOARD_FLASH_SIZE 0x04000000 /* 64MB */
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#define BOARD_FLASH_WIDTH 4 /* 32-bits */
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#endif
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#endif
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#ifdef CONFIG_PCI
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@ -137,52 +120,6 @@ static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
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}
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#endif
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#ifdef CONFIG_MIPS_BOSPORUS
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static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
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{
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if ((slot < 11) || (slot > 13) || pin == 0)
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return -1;
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if (slot == 12)
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return (pin == 1) ? AU1500_PCI_INTA : 0xff;
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if (slot == 11) {
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switch (pin) {
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case 1: return AU1500_PCI_INTA;
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case 2: return AU1500_PCI_INTB;
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default: return 0xff;
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}
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}
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if (slot == 13) {
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switch (pin) {
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case 1: return AU1500_PCI_INTA;
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case 2: return AU1500_PCI_INTB;
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case 3: return AU1500_PCI_INTC;
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case 4: return AU1500_PCI_INTD;
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}
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}
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return -1;
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}
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#endif
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#ifdef CONFIG_MIPS_MIRAGE
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static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
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{
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if ((slot < 11) || (slot > 13) || pin == 0)
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return -1;
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if (slot == 11)
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return (pin == 1) ? AU1500_PCI_INTD : 0xff;
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if (slot == 12)
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return (pin == 3) ? AU1500_PCI_INTC : 0xff;
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if (slot == 13) {
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switch (pin) {
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case 1: return AU1500_PCI_INTA;
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case 2: return AU1500_PCI_INTB;
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default: return 0xff;
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}
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}
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return -1;
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}
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#endif
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static struct resource alchemy_pci_host_res[] = {
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[0] = {
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.start = AU1500_PCI_PHYS_ADDR,
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@ -280,7 +217,6 @@ static struct platform_device db1x00_audio_dev = {
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static int __init db1xxx_dev_init(void)
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{
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#ifdef DB1XXX_HAS_PCMCIA
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db1x_register_pcmcia_socket(
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AU1000_PCMCIA_ATTR_PHYS_ADDR,
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AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
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AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
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DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1,
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/*DB1XXX_PCMCIA_STSCHG1*/0, 0, 1);
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#endif
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#ifdef CONFIG_MIPS_DB1100
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platform_device_register(&au1100_lcd_device);
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#endif
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db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED);
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platform_device_register(&db1x00_codec_dev);
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platform_device_register(&alchemy_ac97c_dma_dev);
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platform_device_register(&alchemy_ac97c_dev);
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platform_device_register(&db1x00_audio_dev);
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db1x_register_norflash(BOARD_FLASH_SIZE, 4 /* 32bit */, F_SWAPPED);
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return 0;
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}
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device_initcall(db1xxx_dev_init);
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@ -35,8 +35,7 @@
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#if defined(CONFIG_MIPS_DB1000) || \
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defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1100) || \
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defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_DB1500) || \
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defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE)
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defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_DB1500)
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#define ALCHEMY_BOARD_DEFAULT_MEMSIZE 0x04000000
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#else /* Au1550/Au1200-based develboards */
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