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ARM: 6245/1: mmci: enable hardware flow control on Ux500 variants
Although both the U300 and Ux500 use ST variants, the HWFCEN bits are at different positions, so use the variant_data to store the information. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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parent
4956e10903
commit
4380c14fd7
2 changed files with 6 additions and 4 deletions
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@ -39,19 +39,23 @@ static unsigned int fmax = 515633;
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/**
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* struct variant_data - MMCI variant-specific quirks
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* @clkreg: default value for MCICLOCK register
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* @clkreg_enable: enable value for MMCICLOCK register
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*/
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struct variant_data {
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unsigned int clkreg;
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unsigned int clkreg_enable;
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};
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static struct variant_data variant_arm = {
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};
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static struct variant_data variant_u300 = {
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.clkreg_enable = 1 << 13, /* HWFCEN */
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};
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static struct variant_data variant_ux500 = {
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.clkreg = MCI_CLK_ENABLE,
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.clkreg_enable = 1 << 14, /* HWFCEN */
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};
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/*
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* This must be called with host->lock held
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@ -71,8 +75,8 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
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clk = 255;
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host->cclk = host->mclk / (2 * (clk + 1));
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}
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if (host->hw_designer == AMBA_VENDOR_ST)
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clk |= MCI_ST_FCEN; /* Bug fix in ST IP block */
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clk |= variant->clkreg_enable;
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clk |= MCI_CLK_ENABLE;
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/* This hasn't proven to be worthwhile */
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/* clk |= MCI_CLK_PWRSAVE; */
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@ -28,8 +28,6 @@
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#define MCI_4BIT_BUS (1 << 11)
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/* 8bit wide buses supported in ST Micro versions */
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#define MCI_ST_8BIT_BUS (1 << 12)
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/* HW flow control on the ST Micro version */
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#define MCI_ST_FCEN (1 << 13)
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#define MMCIARGUMENT 0x008
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#define MMCICOMMAND 0x00c
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