mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-06 19:07:52 +00:00
Via Paul Walmsley <paul@pwsan.com>:
Move some of the OMAP2+ CM and System Control Module direct register accesses into CM- and System Control Module-specific "drivers" underneath arch/arm/mach-omap2/. This is a prerequisite for moving this code out of arch/arm/mach-omap2/ into drivers/. Basic test logs are available here: http://www.pwsan.com/omap/testlogs/cm_scm_cleanup_a_v3.13/20131019101809/ -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.15 (GNU/Linux) iQIcBAABAgAGBQJSZAZXAAoJEBvUPslcq6VzCWQQAKH4Rj0izwbbLkgBAeeaQz5K oJgPJ6UPLOJ2uLIUauCKUSR6+nktrCTfV8P+J4DhCc6OiGrKBXJhSETPgaTbWsNw Bd577pmuvXSfNFXUaLwCgkSmafJ1pi6d7kEx/7ZW3TziVE/aUxyeHkrMtWJHrjTP 28tJVieOxLlO5iK06DfmGcCpLUBKJKtgGRo0h/oqMhLAaN5S8//lyVYgdsto7oCN /bes6OpuVVdKiSr78V4rCVtR5Lij5+lVrT8HDiw2BA0V3bYcI7+CVlWBPZ3mYkuy oAJDcn9whNyfWS+SsaTIjy6nHsgQkhEJnhrQW3k2skVZobRtWDv7U5LiTjsUhb3o pjyWD8zZ7jqrkgyLsai6dm1zsljMQXsIQwH5h++HdCRhtNOXd6bVQZy0KqkpLu0y Bhpt8/edh4Bdc305oB05/Y9Uxr7Gr8M377chVZx+JD3rxIDjRRyOJcRIhd27WZEf HSMLpO/ayUXWdDuTlKW0IEnImx3PrxT913cnjIY589FhfdahfGQoft4sWDeiQLAX +zVYZljeY+GxbUWO6aY4m2PfVN9p/Hwal58NZZgj59wq9iHUuJErK11X7rj+2vwN +20IS8sikz6Iym84iC0T+omUeFVY0Zo004DVvpPB+D1C2LpwdI1c6kTz4DYT1EBP pvs8Wihkk7xQxQn0rBGP =L37r -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.13/cm-scm-cleanup-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup From Paul Walmsley <paul@pwsan.com> via Tony Lindgren: Move some of the OMAP2+ CM and System Control Module direct register accesses into CM- and System Control Module-specific "drivers" underneath arch/arm/mach-omap2/. This is a prerequisite for moving this code out of arch/arm/mach-omap2/ into drivers/. Basic test logs are available here: http://www.pwsan.com/omap/testlogs/cm_scm_cleanup_a_v3.13/20131019101809/ * tag 'omap-for-v3.13/cm-scm-cleanup-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP3: control: add API for setting IVA bootmode ARM: OMAP3: CM/control: move CM scratchpad save to CM driver ARM: OMAP3: McBSP: do not access CM register directly ARM: OMAP3: clock: add API to enable/disable autoidle for a single clock ARM: OMAP2: CM/PM: remove direct register accesses outside CM code + Linux 3.12-rc4 Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
43d93947a5
539 changed files with 5300 additions and 3072 deletions
3
CREDITS
3
CREDITS
|
@ -2808,8 +2808,7 @@ S: Ottawa, Ontario
|
||||||
S: Canada K2P 0X8
|
S: Canada K2P 0X8
|
||||||
|
|
||||||
N: Mikael Pettersson
|
N: Mikael Pettersson
|
||||||
E: mikpe@it.uu.se
|
E: mikpelinux@gmail.com
|
||||||
W: http://user.it.uu.se/~mikpe/linux/
|
|
||||||
D: Miscellaneous fixes
|
D: Miscellaneous fixes
|
||||||
|
|
||||||
N: Reed H. Petty
|
N: Reed H. Petty
|
||||||
|
|
|
@ -6,6 +6,8 @@ capability.txt
|
||||||
- Generic Block Device Capability (/sys/block/<device>/capability)
|
- Generic Block Device Capability (/sys/block/<device>/capability)
|
||||||
cfq-iosched.txt
|
cfq-iosched.txt
|
||||||
- CFQ IO scheduler tunables
|
- CFQ IO scheduler tunables
|
||||||
|
cmdline-partition.txt
|
||||||
|
- how to specify block device partitions on kernel command line
|
||||||
data-integrity.txt
|
data-integrity.txt
|
||||||
- Block data integrity
|
- Block data integrity
|
||||||
deadline-iosched.txt
|
deadline-iosched.txt
|
||||||
|
|
|
@ -1,9 +1,9 @@
|
||||||
Embedded device command line partition
|
Embedded device command line partition parsing
|
||||||
=====================================================================
|
=====================================================================
|
||||||
|
|
||||||
Read block device partition table from command line.
|
Support for reading the block device partition table from the command line.
|
||||||
The partition used for fixed block device (eMMC) embedded device.
|
It is typically used for fixed block (eMMC) embedded devices.
|
||||||
It is no MBR, save storage space. Bootloader can be easily accessed
|
It has no MBR, so saves storage space. Bootloader can be easily accessed
|
||||||
by absolute address of data on the block device.
|
by absolute address of data on the block device.
|
||||||
Users can easily change the partition.
|
Users can easily change the partition.
|
||||||
|
|
||||||
|
|
|
@ -1,11 +1,11 @@
|
||||||
* Samsung Exynos specific extensions to the Synopsis Designware Mobile
|
* Samsung Exynos specific extensions to the Synopsys Designware Mobile
|
||||||
Storage Host Controller
|
Storage Host Controller
|
||||||
|
|
||||||
The Synopsis designware mobile storage host controller is used to interface
|
The Synopsys designware mobile storage host controller is used to interface
|
||||||
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
||||||
differences between the core Synopsis dw mshc controller properties described
|
differences between the core Synopsys dw mshc controller properties described
|
||||||
by synopsis-dw-mshc.txt and the properties used by the Samsung Exynos specific
|
by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
|
||||||
extensions to the Synopsis Designware Mobile Storage Host Controller.
|
extensions to the Synopsys Designware Mobile Storage Host Controller.
|
||||||
|
|
||||||
Required Properties:
|
Required Properties:
|
||||||
|
|
||||||
|
|
|
@ -1,11 +1,11 @@
|
||||||
* Rockchip specific extensions to the Synopsis Designware Mobile
|
* Rockchip specific extensions to the Synopsys Designware Mobile
|
||||||
Storage Host Controller
|
Storage Host Controller
|
||||||
|
|
||||||
The Synopsis designware mobile storage host controller is used to interface
|
The Synopsys designware mobile storage host controller is used to interface
|
||||||
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
||||||
differences between the core Synopsis dw mshc controller properties described
|
differences between the core Synopsys dw mshc controller properties described
|
||||||
by synopsis-dw-mshc.txt and the properties used by the Rockchip specific
|
by synopsys-dw-mshc.txt and the properties used by the Rockchip specific
|
||||||
extensions to the Synopsis Designware Mobile Storage Host Controller.
|
extensions to the Synopsys Designware Mobile Storage Host Controller.
|
||||||
|
|
||||||
Required Properties:
|
Required Properties:
|
||||||
|
|
||||||
|
|
|
@ -1,14 +1,14 @@
|
||||||
* Synopsis Designware Mobile Storage Host Controller
|
* Synopsys Designware Mobile Storage Host Controller
|
||||||
|
|
||||||
The Synopsis designware mobile storage host controller is used to interface
|
The Synopsys designware mobile storage host controller is used to interface
|
||||||
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
||||||
differences between the core mmc properties described by mmc.txt and the
|
differences between the core mmc properties described by mmc.txt and the
|
||||||
properties used by the Synopsis Designware Mobile Storage Host Controller.
|
properties used by the Synopsys Designware Mobile Storage Host Controller.
|
||||||
|
|
||||||
Required Properties:
|
Required Properties:
|
||||||
|
|
||||||
* compatible: should be
|
* compatible: should be
|
||||||
- snps,dw-mshc: for controllers compliant with synopsis dw-mshc.
|
- snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
|
||||||
* #address-cells: should be 1.
|
* #address-cells: should be 1.
|
||||||
* #size-cells: should be 0.
|
* #size-cells: should be 0.
|
||||||
|
|
|
@ -86,6 +86,7 @@ General Properties:
|
||||||
|
|
||||||
Clock Properties:
|
Clock Properties:
|
||||||
|
|
||||||
|
- fsl,cksel Timer reference clock source.
|
||||||
- fsl,tclk-period Timer reference clock period in nanoseconds.
|
- fsl,tclk-period Timer reference clock period in nanoseconds.
|
||||||
- fsl,tmr-prsc Prescaler, divides the output clock.
|
- fsl,tmr-prsc Prescaler, divides the output clock.
|
||||||
- fsl,tmr-add Frequency compensation value.
|
- fsl,tmr-add Frequency compensation value.
|
||||||
|
@ -97,7 +98,7 @@ Clock Properties:
|
||||||
clock. You must choose these carefully for the clock to work right.
|
clock. You must choose these carefully for the clock to work right.
|
||||||
Here is how to figure good values:
|
Here is how to figure good values:
|
||||||
|
|
||||||
TimerOsc = system clock MHz
|
TimerOsc = selected reference clock MHz
|
||||||
tclk_period = desired clock period nanoseconds
|
tclk_period = desired clock period nanoseconds
|
||||||
NominalFreq = 1000 / tclk_period MHz
|
NominalFreq = 1000 / tclk_period MHz
|
||||||
FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
|
FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
|
||||||
|
@ -114,6 +115,20 @@ Clock Properties:
|
||||||
Pulse Per Second (PPS) signal, since this will be offered to the PPS
|
Pulse Per Second (PPS) signal, since this will be offered to the PPS
|
||||||
subsystem to synchronize the Linux clock.
|
subsystem to synchronize the Linux clock.
|
||||||
|
|
||||||
|
Reference clock source is determined by the value, which is holded
|
||||||
|
in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
|
||||||
|
value, which will be directly written in those bits, that is why,
|
||||||
|
according to reference manual, the next clock sources can be used:
|
||||||
|
|
||||||
|
<0> - external high precision timer reference clock (TSEC_TMR_CLK
|
||||||
|
input is used for this purpose);
|
||||||
|
<1> - eTSEC system clock;
|
||||||
|
<2> - eTSEC1 transmit clock;
|
||||||
|
<3> - RTC clock input.
|
||||||
|
|
||||||
|
When this attribute is not used, eTSEC system clock will serve as
|
||||||
|
IEEE 1588 timer reference clock.
|
||||||
|
|
||||||
Example:
|
Example:
|
||||||
|
|
||||||
ptp_clock@24E00 {
|
ptp_clock@24E00 {
|
||||||
|
@ -121,6 +136,7 @@ Example:
|
||||||
reg = <0x24E00 0xB0>;
|
reg = <0x24E00 0xB0>;
|
||||||
interrupts = <12 0x8 13 0x8>;
|
interrupts = <12 0x8 13 0x8>;
|
||||||
interrupt-parent = < &ipic >;
|
interrupt-parent = < &ipic >;
|
||||||
|
fsl,cksel = <1>;
|
||||||
fsl,tclk-period = <10>;
|
fsl,tclk-period = <10>;
|
||||||
fsl,tmr-prsc = <100>;
|
fsl,tmr-prsc = <100>;
|
||||||
fsl,tmr-add = <0x999999A4>;
|
fsl,tmr-add = <0x999999A4>;
|
||||||
|
|
|
@ -1,4 +1,4 @@
|
||||||
* Synopsis Designware PCIe interface
|
* Synopsys Designware PCIe interface
|
||||||
|
|
||||||
Required properties:
|
Required properties:
|
||||||
- compatible: should contain "snps,dw-pcie" to identify the
|
- compatible: should contain "snps,dw-pcie" to identify the
|
||||||
|
|
|
@ -480,6 +480,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
Format: <io>,<irq>,<mode>
|
Format: <io>,<irq>,<mode>
|
||||||
See header of drivers/net/hamradio/baycom_ser_hdx.c.
|
See header of drivers/net/hamradio/baycom_ser_hdx.c.
|
||||||
|
|
||||||
|
blkdevparts= Manual partition parsing of block device(s) for
|
||||||
|
embedded devices based on command line input.
|
||||||
|
See Documentation/block/cmdline-partition.txt
|
||||||
|
|
||||||
boot_delay= Milliseconds to delay each printk during boot.
|
boot_delay= Milliseconds to delay each printk during boot.
|
||||||
Values larger than 10 seconds (10000) are changed to
|
Values larger than 10 seconds (10000) are changed to
|
||||||
no delay (0).
|
no delay (0).
|
||||||
|
@ -1357,7 +1361,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
pages. In the event, a node is too small to have both
|
pages. In the event, a node is too small to have both
|
||||||
kernelcore and Movable pages, kernelcore pages will
|
kernelcore and Movable pages, kernelcore pages will
|
||||||
take priority and other nodes will have a larger number
|
take priority and other nodes will have a larger number
|
||||||
of kernelcore pages. The Movable zone is used for the
|
of Movable pages. The Movable zone is used for the
|
||||||
allocation of pages that may be reclaimed or moved
|
allocation of pages that may be reclaimed or moved
|
||||||
by the page migration subsystem. This means that
|
by the page migration subsystem. This means that
|
||||||
HugeTLB pages may not be allocated from this zone.
|
HugeTLB pages may not be allocated from this zone.
|
||||||
|
@ -3485,6 +3489,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
||||||
the unplug protocol
|
the unplug protocol
|
||||||
never -- do not unplug even if version check succeeds
|
never -- do not unplug even if version check succeeds
|
||||||
|
|
||||||
|
xen_nopvspin [X86,XEN]
|
||||||
|
Disables the ticketlock slowpath using Xen PV
|
||||||
|
optimizations.
|
||||||
|
|
||||||
xirc2ps_cs= [NET,PCMCIA]
|
xirc2ps_cs= [NET,PCMCIA]
|
||||||
Format:
|
Format:
|
||||||
<irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]
|
<irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]
|
||||||
|
|
|
@ -296,6 +296,12 @@ Cirrus Logic CS4206/4207
|
||||||
imac27 IMac 27 Inch
|
imac27 IMac 27 Inch
|
||||||
auto BIOS setup (default)
|
auto BIOS setup (default)
|
||||||
|
|
||||||
|
Cirrus Logic CS4208
|
||||||
|
===================
|
||||||
|
mba6 MacBook Air 6,1 and 6,2
|
||||||
|
gpio0 Enable GPIO 0 amp
|
||||||
|
auto BIOS setup (default)
|
||||||
|
|
||||||
VIA VT17xx/VT18xx/VT20xx
|
VIA VT17xx/VT18xx/VT20xx
|
||||||
========================
|
========================
|
||||||
auto BIOS setup (default)
|
auto BIOS setup (default)
|
||||||
|
|
40
MAINTAINERS
40
MAINTAINERS
|
@ -828,15 +828,21 @@ S: Maintained
|
||||||
F: arch/arm/mach-gemini/
|
F: arch/arm/mach-gemini/
|
||||||
|
|
||||||
ARM/CSR SIRFPRIMA2 MACHINE SUPPORT
|
ARM/CSR SIRFPRIMA2 MACHINE SUPPORT
|
||||||
M: Barry Song <baohua.song@csr.com>
|
M: Barry Song <baohua@kernel.org>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-prima2/
|
F: arch/arm/mach-prima2/
|
||||||
|
F: drivers/clk/clk-prima2.c
|
||||||
|
F: drivers/clocksource/timer-prima2.c
|
||||||
|
F: drivers/clocksource/timer-marco.c
|
||||||
F: drivers/dma/sirf-dma.c
|
F: drivers/dma/sirf-dma.c
|
||||||
F: drivers/i2c/busses/i2c-sirf.c
|
F: drivers/i2c/busses/i2c-sirf.c
|
||||||
|
F: drivers/input/misc/sirfsoc-onkey.c
|
||||||
|
F: drivers/irqchip/irq-sirfsoc.c
|
||||||
F: drivers/mmc/host/sdhci-sirf.c
|
F: drivers/mmc/host/sdhci-sirf.c
|
||||||
F: drivers/pinctrl/sirf/
|
F: drivers/pinctrl/sirf/
|
||||||
|
F: drivers/rtc/rtc-sirfsoc.c
|
||||||
F: drivers/spi/spi-sirf.c
|
F: drivers/spi/spi-sirf.c
|
||||||
|
|
||||||
ARM/EBSA110 MACHINE SUPPORT
|
ARM/EBSA110 MACHINE SUPPORT
|
||||||
|
@ -1813,7 +1819,8 @@ S: Supported
|
||||||
F: drivers/net/ethernet/broadcom/bnx2x/
|
F: drivers/net/ethernet/broadcom/bnx2x/
|
||||||
|
|
||||||
BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE
|
BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE
|
||||||
M: Christian Daudt <csd@broadcom.com>
|
M: Christian Daudt <bcm@fixthebug.org>
|
||||||
|
L: bcm-kernel-feedback-list@broadcom.com
|
||||||
T: git git://git.github.com/broadcom/bcm11351
|
T: git git://git.github.com/broadcom/bcm11351
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-bcm/
|
F: arch/arm/mach-bcm/
|
||||||
|
@ -2640,6 +2647,18 @@ F: include/linux/device-mapper.h
|
||||||
F: include/linux/dm-*.h
|
F: include/linux/dm-*.h
|
||||||
F: include/uapi/linux/dm-*.h
|
F: include/uapi/linux/dm-*.h
|
||||||
|
|
||||||
|
DIGI NEO AND CLASSIC PCI PRODUCTS
|
||||||
|
M: Lidza Louina <lidza.louina@gmail.com>
|
||||||
|
L: driverdev-devel@linuxdriverproject.org
|
||||||
|
S: Maintained
|
||||||
|
F: drivers/staging/dgnc/
|
||||||
|
|
||||||
|
DIGI EPCA PCI PRODUCTS
|
||||||
|
M: Lidza Louina <lidza.louina@gmail.com>
|
||||||
|
L: driverdev-devel@linuxdriverproject.org
|
||||||
|
S: Maintained
|
||||||
|
F: drivers/staging/dgap/
|
||||||
|
|
||||||
DIOLAN U2C-12 I2C DRIVER
|
DIOLAN U2C-12 I2C DRIVER
|
||||||
M: Guenter Roeck <linux@roeck-us.net>
|
M: Guenter Roeck <linux@roeck-us.net>
|
||||||
L: linux-i2c@vger.kernel.org
|
L: linux-i2c@vger.kernel.org
|
||||||
|
@ -4458,6 +4477,13 @@ L: linux-serial@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/tty/serial/ioc3_serial.c
|
F: drivers/tty/serial/ioc3_serial.c
|
||||||
|
|
||||||
|
IOMMU DRIVERS
|
||||||
|
M: Joerg Roedel <joro@8bytes.org>
|
||||||
|
L: iommu@lists.linux-foundation.org
|
||||||
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
|
||||||
|
S: Maintained
|
||||||
|
F: drivers/iommu/
|
||||||
|
|
||||||
IP MASQUERADING
|
IP MASQUERADING
|
||||||
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
@ -6596,7 +6622,7 @@ S: Obsolete
|
||||||
F: drivers/net/wireless/prism54/
|
F: drivers/net/wireless/prism54/
|
||||||
|
|
||||||
PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER
|
PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER
|
||||||
M: Mikael Pettersson <mikpe@it.uu.se>
|
M: Mikael Pettersson <mikpelinux@gmail.com>
|
||||||
L: linux-ide@vger.kernel.org
|
L: linux-ide@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/ata/sata_promise.*
|
F: drivers/ata/sata_promise.*
|
||||||
|
@ -7259,9 +7285,9 @@ F: include/linux/sched.h
|
||||||
F: include/uapi/linux/sched.h
|
F: include/uapi/linux/sched.h
|
||||||
|
|
||||||
SCORE ARCHITECTURE
|
SCORE ARCHITECTURE
|
||||||
M: Chen Liqin <liqin.chen@sunplusct.com>
|
M: Chen Liqin <liqin.linux@gmail.com>
|
||||||
M: Lennox Wu <lennox.wu@gmail.com>
|
M: Lennox Wu <lennox.wu@gmail.com>
|
||||||
W: http://www.sunplusct.com
|
W: http://www.sunplus.com
|
||||||
S: Supported
|
S: Supported
|
||||||
F: arch/score/
|
F: arch/score/
|
||||||
|
|
||||||
|
@ -8725,9 +8751,8 @@ F: Documentation/hid/hiddev.txt
|
||||||
F: drivers/hid/usbhid/
|
F: drivers/hid/usbhid/
|
||||||
|
|
||||||
USB/IP DRIVERS
|
USB/IP DRIVERS
|
||||||
M: Matt Mooney <mfm@muteddisk.com>
|
|
||||||
L: linux-usb@vger.kernel.org
|
L: linux-usb@vger.kernel.org
|
||||||
S: Maintained
|
S: Orphan
|
||||||
F: drivers/staging/usbip/
|
F: drivers/staging/usbip/
|
||||||
|
|
||||||
USB ISP116X DRIVER
|
USB ISP116X DRIVER
|
||||||
|
@ -9367,6 +9392,7 @@ F: arch/arm64/include/asm/xen/
|
||||||
|
|
||||||
XEN NETWORK BACKEND DRIVER
|
XEN NETWORK BACKEND DRIVER
|
||||||
M: Ian Campbell <ian.campbell@citrix.com>
|
M: Ian Campbell <ian.campbell@citrix.com>
|
||||||
|
M: Wei Liu <wei.liu2@citrix.com>
|
||||||
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
S: Supported
|
S: Supported
|
||||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
||||||
VERSION = 3
|
VERSION = 3
|
||||||
PATCHLEVEL = 12
|
PATCHLEVEL = 12
|
||||||
SUBLEVEL = 0
|
SUBLEVEL = 0
|
||||||
EXTRAVERSION = -rc2
|
EXTRAVERSION = -rc4
|
||||||
NAME = One Giant Leap for Frogkind
|
NAME = One Giant Leap for Frogkind
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
|
|
@ -286,9 +286,6 @@ config HAVE_PERF_USER_STACK_DUMP
|
||||||
config HAVE_ARCH_JUMP_LABEL
|
config HAVE_ARCH_JUMP_LABEL
|
||||||
bool
|
bool
|
||||||
|
|
||||||
config HAVE_ARCH_MUTEX_CPU_RELAX
|
|
||||||
bool
|
|
||||||
|
|
||||||
config HAVE_RCU_TABLE_FREE
|
config HAVE_RCU_TABLE_FREE
|
||||||
bool
|
bool
|
||||||
|
|
||||||
|
|
|
@ -45,7 +45,14 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
|
||||||
|
|
||||||
static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
||||||
{
|
{
|
||||||
lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
|
unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__;
|
||||||
|
|
||||||
|
__asm__ __volatile__(
|
||||||
|
" ex %0, [%1] \n"
|
||||||
|
: "+r" (tmp)
|
||||||
|
: "r"(&(lock->slock))
|
||||||
|
: "memory");
|
||||||
|
|
||||||
smp_mb();
|
smp_mb();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -43,7 +43,7 @@
|
||||||
* Because it essentially checks if buffer end is within limit and @len is
|
* Because it essentially checks if buffer end is within limit and @len is
|
||||||
* non-ngeative, which implies that buffer start will be within limit too.
|
* non-ngeative, which implies that buffer start will be within limit too.
|
||||||
*
|
*
|
||||||
* The reason for rewriting being, for majorit yof cases, @len is generally
|
* The reason for rewriting being, for majority of cases, @len is generally
|
||||||
* compile time constant, causing first sub-expression to be compile time
|
* compile time constant, causing first sub-expression to be compile time
|
||||||
* subsumed.
|
* subsumed.
|
||||||
*
|
*
|
||||||
|
@ -53,7 +53,7 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
#define __user_ok(addr, sz) (((sz) <= TASK_SIZE) && \
|
#define __user_ok(addr, sz) (((sz) <= TASK_SIZE) && \
|
||||||
(((addr)+(sz)) <= get_fs()))
|
((addr) <= (get_fs() - (sz))))
|
||||||
#define __access_ok(addr, sz) (unlikely(__kernel_ok) || \
|
#define __access_ok(addr, sz) (unlikely(__kernel_ok) || \
|
||||||
likely(__user_ok((addr), (sz))))
|
likely(__user_ok((addr), (sz))))
|
||||||
|
|
||||||
|
|
|
@ -101,7 +101,6 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
||||||
{
|
{
|
||||||
struct rt_sigframe __user *sf;
|
struct rt_sigframe __user *sf;
|
||||||
unsigned int magic;
|
unsigned int magic;
|
||||||
int err;
|
|
||||||
struct pt_regs *regs = current_pt_regs();
|
struct pt_regs *regs = current_pt_regs();
|
||||||
|
|
||||||
/* Always make any pending restarted system calls return -EINTR */
|
/* Always make any pending restarted system calls return -EINTR */
|
||||||
|
@ -119,15 +118,16 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
||||||
if (!access_ok(VERIFY_READ, sf, sizeof(*sf)))
|
if (!access_ok(VERIFY_READ, sf, sizeof(*sf)))
|
||||||
goto badframe;
|
goto badframe;
|
||||||
|
|
||||||
err = restore_usr_regs(regs, sf);
|
if (__get_user(magic, &sf->sigret_magic))
|
||||||
err |= __get_user(magic, &sf->sigret_magic);
|
|
||||||
if (err)
|
|
||||||
goto badframe;
|
goto badframe;
|
||||||
|
|
||||||
if (unlikely(is_do_ss_needed(magic)))
|
if (unlikely(is_do_ss_needed(magic)))
|
||||||
if (restore_altstack(&sf->uc.uc_stack))
|
if (restore_altstack(&sf->uc.uc_stack))
|
||||||
goto badframe;
|
goto badframe;
|
||||||
|
|
||||||
|
if (restore_usr_regs(regs, sf))
|
||||||
|
goto badframe;
|
||||||
|
|
||||||
/* Don't restart from sigreturn */
|
/* Don't restart from sigreturn */
|
||||||
syscall_wont_restart(regs);
|
syscall_wont_restart(regs);
|
||||||
|
|
||||||
|
@ -190,6 +190,15 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
|
||||||
if (!sf)
|
if (!sf)
|
||||||
return 1;
|
return 1;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* w/o SA_SIGINFO, struct ucontext is partially populated (only
|
||||||
|
* uc_mcontext/uc_sigmask) for kernel's normal user state preservation
|
||||||
|
* during signal handler execution. This works for SA_SIGINFO as well
|
||||||
|
* although the semantics are now overloaded (the same reg state can be
|
||||||
|
* inspected by userland: but are they allowed to fiddle with it ?
|
||||||
|
*/
|
||||||
|
err |= stash_usr_regs(sf, regs, set);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SA_SIGINFO requires 3 args to signal handler:
|
* SA_SIGINFO requires 3 args to signal handler:
|
||||||
* #1: sig-no (common to any handler)
|
* #1: sig-no (common to any handler)
|
||||||
|
@ -213,14 +222,6 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
|
||||||
magic = MAGIC_SIGALTSTK;
|
magic = MAGIC_SIGALTSTK;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* w/o SA_SIGINFO, struct ucontext is partially populated (only
|
|
||||||
* uc_mcontext/uc_sigmask) for kernel's normal user state preservation
|
|
||||||
* during signal handler execution. This works for SA_SIGINFO as well
|
|
||||||
* although the semantics are now overloaded (the same reg state can be
|
|
||||||
* inspected by userland: but are they allowed to fiddle with it ?
|
|
||||||
*/
|
|
||||||
err |= stash_usr_regs(sf, regs, set);
|
|
||||||
err |= __put_user(magic, &sf->sigret_magic);
|
err |= __put_user(magic, &sf->sigret_magic);
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
|
@ -227,12 +227,9 @@ void __attribute__((weak)) arc_local_timer_setup(unsigned int cpu)
|
||||||
{
|
{
|
||||||
struct clock_event_device *clk = &per_cpu(arc_clockevent_device, cpu);
|
struct clock_event_device *clk = &per_cpu(arc_clockevent_device, cpu);
|
||||||
|
|
||||||
clockevents_calc_mult_shift(clk, arc_get_core_freq(), 5);
|
|
||||||
|
|
||||||
clk->max_delta_ns = clockevent_delta2ns(ARC_TIMER_MAX, clk);
|
|
||||||
clk->cpumask = cpumask_of(cpu);
|
clk->cpumask = cpumask_of(cpu);
|
||||||
|
clockevents_config_and_register(clk, arc_get_core_freq(),
|
||||||
clockevents_register_device(clk);
|
0, ARC_TIMER_MAX);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* setup the per-cpu timer IRQ handler - for all cpus
|
* setup the per-cpu timer IRQ handler - for all cpus
|
||||||
|
|
|
@ -245,6 +245,12 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,
|
||||||
regs->status32 &= ~STATUS_DE_MASK;
|
regs->status32 &= ~STATUS_DE_MASK;
|
||||||
} else {
|
} else {
|
||||||
regs->ret += state.instr_len;
|
regs->ret += state.instr_len;
|
||||||
|
|
||||||
|
/* handle zero-overhead-loop */
|
||||||
|
if ((regs->ret == regs->lp_end) && (regs->lp_count)) {
|
||||||
|
regs->ret = regs->lp_start;
|
||||||
|
regs->lp_count--;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -2185,8 +2185,7 @@ config NEON
|
||||||
|
|
||||||
config KERNEL_MODE_NEON
|
config KERNEL_MODE_NEON
|
||||||
bool "Support for NEON in kernel mode"
|
bool "Support for NEON in kernel mode"
|
||||||
default n
|
depends on NEON && AEABI
|
||||||
depends on NEON
|
|
||||||
help
|
help
|
||||||
Say Y to include support for NEON in kernel mode.
|
Say Y to include support for NEON in kernel mode.
|
||||||
|
|
||||||
|
|
|
@ -41,6 +41,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb
|
||||||
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
|
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
|
||||||
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
|
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
|
||||||
|
|
||||||
|
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
|
||||||
|
|
||||||
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
|
||||||
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \
|
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \
|
||||||
bcm28155-ap.dtb
|
bcm28155-ap.dtb
|
||||||
|
|
|
@ -27,6 +27,25 @@ memory {
|
||||||
};
|
};
|
||||||
|
|
||||||
soc {
|
soc {
|
||||||
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
|
||||||
|
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||||
|
|
||||||
|
pcie-controller {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
/* Connected to Marvell SATA controller */
|
||||||
|
pcie@1,0 {
|
||||||
|
/* Port 0, Lane 0 */
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Connected to FL1009 USB 3.0 controller */
|
||||||
|
pcie@2,0 {
|
||||||
|
/* Port 1, Lane 0 */
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
internal-regs {
|
internal-regs {
|
||||||
serial@12000 {
|
serial@12000 {
|
||||||
clock-frequency = <200000000>;
|
clock-frequency = <200000000>;
|
||||||
|
@ -57,6 +76,11 @@ backup_led_pin: backup-led-pin {
|
||||||
marvell,pins = "mpp56";
|
marvell,pins = "mpp56";
|
||||||
marvell,function = "gpio";
|
marvell,function = "gpio";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
poweroff: poweroff {
|
||||||
|
marvell,pins = "mpp8";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
mdio {
|
mdio {
|
||||||
|
@ -89,22 +113,6 @@ g762: g762@3e {
|
||||||
pwm_polarity = <0>;
|
pwm_polarity = <0>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
pcie-controller {
|
|
||||||
status = "okay";
|
|
||||||
|
|
||||||
/* Connected to Marvell SATA controller */
|
|
||||||
pcie@1,0 {
|
|
||||||
/* Port 0, Lane 0 */
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Connected to FL1009 USB 3.0 controller */
|
|
||||||
pcie@2,0 {
|
|
||||||
/* Port 1, Lane 0 */
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -160,7 +168,7 @@ gpio_keys {
|
||||||
button@1 {
|
button@1 {
|
||||||
label = "Power Button";
|
label = "Power Button";
|
||||||
linux,code = <116>; /* KEY_POWER */
|
linux,code = <116>; /* KEY_POWER */
|
||||||
gpios = <&gpio1 30 1>;
|
gpios = <&gpio1 30 0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
button@2 {
|
button@2 {
|
||||||
|
@ -176,4 +184,11 @@ button@3 {
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
gpio_poweroff {
|
||||||
|
compatible = "gpio-poweroff";
|
||||||
|
pinctrl-0 = <&poweroff>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
gpios = <&gpio0 8 1>;
|
||||||
|
};
|
||||||
|
|
||||||
};
|
};
|
||||||
|
|
|
@ -70,6 +70,8 @@ serial@12300 {
|
||||||
|
|
||||||
timer@20300 {
|
timer@20300 {
|
||||||
compatible = "marvell,armada-xp-timer";
|
compatible = "marvell,armada-xp-timer";
|
||||||
|
clocks = <&coreclk 2>, <&refclk>;
|
||||||
|
clock-names = "nbclk", "fixed";
|
||||||
};
|
};
|
||||||
|
|
||||||
coreclk: mvebu-sar@18230 {
|
coreclk: mvebu-sar@18230 {
|
||||||
|
@ -169,4 +171,13 @@ thermal@182b0 {
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
clocks {
|
||||||
|
/* 25 MHz reference crystal */
|
||||||
|
refclk: oscillator {
|
||||||
|
compatible = "fixed-clock";
|
||||||
|
#clock-cells = <0>;
|
||||||
|
clock-frequency = <25000000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
|
@ -190,12 +190,12 @@ pinctrl_usart2: usart2-0 {
|
||||||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
|
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
|
||||||
};
|
};
|
||||||
|
|
||||||
pinctrl_uart2_rts: uart2_rts-0 {
|
pinctrl_usart2_rts: usart2_rts-0 {
|
||||||
atmel,pins =
|
atmel,pins =
|
||||||
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
|
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
|
||||||
};
|
};
|
||||||
|
|
||||||
pinctrl_uart2_cts: uart2_cts-0 {
|
pinctrl_usart2_cts: usart2_cts-0 {
|
||||||
atmel,pins =
|
atmel,pins =
|
||||||
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
|
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
|
||||||
};
|
};
|
||||||
|
@ -505,6 +505,7 @@ mmc0: mmc@f0008000 {
|
||||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
|
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
|
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||||
dma-names = "rxtx";
|
dma-names = "rxtx";
|
||||||
|
pinctrl-names = "default";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
@ -516,6 +517,7 @@ mmc1: mmc@f000c000 {
|
||||||
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
|
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||||
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
|
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||||
dma-names = "rxtx";
|
dma-names = "rxtx";
|
||||||
|
pinctrl-names = "default";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
|
@ -181,6 +181,8 @@ uart0: uart@b0050000 {
|
||||||
interrupts = <17>;
|
interrupts = <17>;
|
||||||
fifosize = <128>;
|
fifosize = <128>;
|
||||||
clocks = <&clks 13>;
|
clocks = <&clks 13>;
|
||||||
|
sirf,uart-dma-rx-channel = <21>;
|
||||||
|
sirf,uart-dma-tx-channel = <2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1: uart@b0060000 {
|
uart1: uart@b0060000 {
|
||||||
|
@ -199,6 +201,8 @@ uart2: uart@b0070000 {
|
||||||
interrupts = <19>;
|
interrupts = <19>;
|
||||||
fifosize = <128>;
|
fifosize = <128>;
|
||||||
clocks = <&clks 15>;
|
clocks = <&clks 15>;
|
||||||
|
sirf,uart-dma-rx-channel = <6>;
|
||||||
|
sirf,uart-dma-tx-channel = <7>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp0: usp@b0080000 {
|
usp0: usp@b0080000 {
|
||||||
|
@ -206,7 +210,10 @@ usp0: usp@b0080000 {
|
||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb0080000 0x10000>;
|
reg = <0xb0080000 0x10000>;
|
||||||
interrupts = <20>;
|
interrupts = <20>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 28>;
|
clocks = <&clks 28>;
|
||||||
|
sirf,usp-dma-rx-channel = <17>;
|
||||||
|
sirf,usp-dma-tx-channel = <18>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp1: usp@b0090000 {
|
usp1: usp@b0090000 {
|
||||||
|
@ -214,7 +221,10 @@ usp1: usp@b0090000 {
|
||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb0090000 0x10000>;
|
reg = <0xb0090000 0x10000>;
|
||||||
interrupts = <21>;
|
interrupts = <21>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 29>;
|
clocks = <&clks 29>;
|
||||||
|
sirf,usp-dma-rx-channel = <14>;
|
||||||
|
sirf,usp-dma-tx-channel = <15>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dmac0: dma-controller@b00b0000 {
|
dmac0: dma-controller@b00b0000 {
|
||||||
|
@ -237,6 +247,8 @@ vip@b00C0000 {
|
||||||
compatible = "sirf,prima2-vip";
|
compatible = "sirf,prima2-vip";
|
||||||
reg = <0xb00C0000 0x10000>;
|
reg = <0xb00C0000 0x10000>;
|
||||||
clocks = <&clks 31>;
|
clocks = <&clks 31>;
|
||||||
|
interrupts = <14>;
|
||||||
|
sirf,vip-dma-rx-channel = <16>;
|
||||||
};
|
};
|
||||||
|
|
||||||
spi0: spi@b00d0000 {
|
spi0: spi@b00d0000 {
|
||||||
|
|
|
@ -13,6 +13,7 @@ cpus {
|
||||||
cpu@0 {
|
cpu@0 {
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
compatible = "marvell,feroceon";
|
compatible = "marvell,feroceon";
|
||||||
|
reg = <0>;
|
||||||
clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
|
clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
|
||||||
clock-names = "cpu_clk", "ddrclk", "powersave";
|
clock-names = "cpu_clk", "ddrclk", "powersave";
|
||||||
};
|
};
|
||||||
|
@ -167,7 +168,7 @@ xor01 {
|
||||||
xor@60900 {
|
xor@60900 {
|
||||||
compatible = "marvell,orion-xor";
|
compatible = "marvell,orion-xor";
|
||||||
reg = <0x60900 0x100
|
reg = <0x60900 0x100
|
||||||
0xd0B00 0x100>;
|
0x60B00 0x100>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
clocks = <&gate_clk 16>;
|
clocks = <&gate_clk 16>;
|
||||||
|
|
||||||
|
|
|
@ -171,7 +171,8 @@ peri-iobg {
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
ranges = <0xb0000000 0xb0000000 0x180000>;
|
ranges = <0xb0000000 0xb0000000 0x180000>,
|
||||||
|
<0x56000000 0x56000000 0x1b00000>;
|
||||||
|
|
||||||
timer@b0020000 {
|
timer@b0020000 {
|
||||||
compatible = "sirf,prima2-tick";
|
compatible = "sirf,prima2-tick";
|
||||||
|
@ -196,25 +197,32 @@ audio@b0040000 {
|
||||||
uart0: uart@b0050000 {
|
uart0: uart@b0050000 {
|
||||||
cell-index = <0>;
|
cell-index = <0>;
|
||||||
compatible = "sirf,prima2-uart";
|
compatible = "sirf,prima2-uart";
|
||||||
reg = <0xb0050000 0x10000>;
|
reg = <0xb0050000 0x1000>;
|
||||||
interrupts = <17>;
|
interrupts = <17>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 13>;
|
clocks = <&clks 13>;
|
||||||
|
sirf,uart-dma-rx-channel = <21>;
|
||||||
|
sirf,uart-dma-tx-channel = <2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart1: uart@b0060000 {
|
uart1: uart@b0060000 {
|
||||||
cell-index = <1>;
|
cell-index = <1>;
|
||||||
compatible = "sirf,prima2-uart";
|
compatible = "sirf,prima2-uart";
|
||||||
reg = <0xb0060000 0x10000>;
|
reg = <0xb0060000 0x1000>;
|
||||||
interrupts = <18>;
|
interrupts = <18>;
|
||||||
|
fifosize = <32>;
|
||||||
clocks = <&clks 14>;
|
clocks = <&clks 14>;
|
||||||
};
|
};
|
||||||
|
|
||||||
uart2: uart@b0070000 {
|
uart2: uart@b0070000 {
|
||||||
cell-index = <2>;
|
cell-index = <2>;
|
||||||
compatible = "sirf,prima2-uart";
|
compatible = "sirf,prima2-uart";
|
||||||
reg = <0xb0070000 0x10000>;
|
reg = <0xb0070000 0x1000>;
|
||||||
interrupts = <19>;
|
interrupts = <19>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 15>;
|
clocks = <&clks 15>;
|
||||||
|
sirf,uart-dma-rx-channel = <6>;
|
||||||
|
sirf,uart-dma-tx-channel = <7>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp0: usp@b0080000 {
|
usp0: usp@b0080000 {
|
||||||
|
@ -222,7 +230,10 @@ usp0: usp@b0080000 {
|
||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb0080000 0x10000>;
|
reg = <0xb0080000 0x10000>;
|
||||||
interrupts = <20>;
|
interrupts = <20>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 28>;
|
clocks = <&clks 28>;
|
||||||
|
sirf,usp-dma-rx-channel = <17>;
|
||||||
|
sirf,usp-dma-tx-channel = <18>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp1: usp@b0090000 {
|
usp1: usp@b0090000 {
|
||||||
|
@ -230,7 +241,10 @@ usp1: usp@b0090000 {
|
||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb0090000 0x10000>;
|
reg = <0xb0090000 0x10000>;
|
||||||
interrupts = <21>;
|
interrupts = <21>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 29>;
|
clocks = <&clks 29>;
|
||||||
|
sirf,usp-dma-rx-channel = <14>;
|
||||||
|
sirf,usp-dma-tx-channel = <15>;
|
||||||
};
|
};
|
||||||
|
|
||||||
usp2: usp@b00a0000 {
|
usp2: usp@b00a0000 {
|
||||||
|
@ -238,7 +252,10 @@ usp2: usp@b00a0000 {
|
||||||
compatible = "sirf,prima2-usp";
|
compatible = "sirf,prima2-usp";
|
||||||
reg = <0xb00a0000 0x10000>;
|
reg = <0xb00a0000 0x10000>;
|
||||||
interrupts = <22>;
|
interrupts = <22>;
|
||||||
|
fifosize = <128>;
|
||||||
clocks = <&clks 30>;
|
clocks = <&clks 30>;
|
||||||
|
sirf,usp-dma-rx-channel = <10>;
|
||||||
|
sirf,usp-dma-tx-channel = <11>;
|
||||||
};
|
};
|
||||||
|
|
||||||
dmac0: dma-controller@b00b0000 {
|
dmac0: dma-controller@b00b0000 {
|
||||||
|
@ -261,6 +278,8 @@ vip@b00C0000 {
|
||||||
compatible = "sirf,prima2-vip";
|
compatible = "sirf,prima2-vip";
|
||||||
reg = <0xb00C0000 0x10000>;
|
reg = <0xb00C0000 0x10000>;
|
||||||
clocks = <&clks 31>;
|
clocks = <&clks 31>;
|
||||||
|
interrupts = <14>;
|
||||||
|
sirf,vip-dma-rx-channel = <16>;
|
||||||
};
|
};
|
||||||
|
|
||||||
spi0: spi@b00d0000 {
|
spi0: spi@b00d0000 {
|
||||||
|
|
|
@ -269,6 +269,11 @@ static const struct edmacc_param dummy_paramset = {
|
||||||
.ccnt = 1,
|
.ccnt = 1,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static const struct of_device_id edma_of_ids[] = {
|
||||||
|
{ .compatible = "ti,edma3", },
|
||||||
|
{}
|
||||||
|
};
|
||||||
|
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
|
static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
|
||||||
|
@ -560,14 +565,38 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,
|
||||||
static int prepare_unused_channel_list(struct device *dev, void *data)
|
static int prepare_unused_channel_list(struct device *dev, void *data)
|
||||||
{
|
{
|
||||||
struct platform_device *pdev = to_platform_device(dev);
|
struct platform_device *pdev = to_platform_device(dev);
|
||||||
int i, ctlr;
|
int i, count, ctlr;
|
||||||
|
struct of_phandle_args dma_spec;
|
||||||
|
|
||||||
|
if (dev->of_node) {
|
||||||
|
count = of_property_count_strings(dev->of_node, "dma-names");
|
||||||
|
if (count < 0)
|
||||||
|
return 0;
|
||||||
|
for (i = 0; i < count; i++) {
|
||||||
|
if (of_parse_phandle_with_args(dev->of_node, "dmas",
|
||||||
|
"#dma-cells", i,
|
||||||
|
&dma_spec))
|
||||||
|
continue;
|
||||||
|
|
||||||
|
if (!of_match_node(edma_of_ids, dma_spec.np)) {
|
||||||
|
of_node_put(dma_spec.np);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
clear_bit(EDMA_CHAN_SLOT(dma_spec.args[0]),
|
||||||
|
edma_cc[0]->edma_unused);
|
||||||
|
of_node_put(dma_spec.np);
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* For non-OF case */
|
||||||
for (i = 0; i < pdev->num_resources; i++) {
|
for (i = 0; i < pdev->num_resources; i++) {
|
||||||
if ((pdev->resource[i].flags & IORESOURCE_DMA) &&
|
if ((pdev->resource[i].flags & IORESOURCE_DMA) &&
|
||||||
(int)pdev->resource[i].start >= 0) {
|
(int)pdev->resource[i].start >= 0) {
|
||||||
ctlr = EDMA_CTLR(pdev->resource[i].start);
|
ctlr = EDMA_CTLR(pdev->resource[i].start);
|
||||||
clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start),
|
clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start),
|
||||||
edma_cc[ctlr]->edma_unused);
|
edma_cc[ctlr]->edma_unused);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1762,11 +1791,6 @@ static int edma_probe(struct platform_device *pdev)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct of_device_id edma_of_ids[] = {
|
|
||||||
{ .compatible = "ti,edma3", },
|
|
||||||
{}
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_driver edma_driver = {
|
static struct platform_driver edma_driver = {
|
||||||
.driver = {
|
.driver = {
|
||||||
.name = "edma",
|
.name = "edma",
|
||||||
|
|
|
@ -135,6 +135,7 @@ CONFIG_MMC=y
|
||||||
CONFIG_MMC_ARMMMCI=y
|
CONFIG_MMC_ARMMMCI=y
|
||||||
CONFIG_MMC_SDHCI=y
|
CONFIG_MMC_SDHCI=y
|
||||||
CONFIG_MMC_SDHCI_PLTFM=y
|
CONFIG_MMC_SDHCI_PLTFM=y
|
||||||
|
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||||
CONFIG_MMC_SDHCI_TEGRA=y
|
CONFIG_MMC_SDHCI_TEGRA=y
|
||||||
CONFIG_MMC_SDHCI_SPEAR=y
|
CONFIG_MMC_SDHCI_SPEAR=y
|
||||||
CONFIG_MMC_OMAP=y
|
CONFIG_MMC_OMAP=y
|
||||||
|
|
|
@ -148,7 +148,7 @@ AES_Te:
|
||||||
@ const AES_KEY *key) {
|
@ const AES_KEY *key) {
|
||||||
.align 5
|
.align 5
|
||||||
ENTRY(AES_encrypt)
|
ENTRY(AES_encrypt)
|
||||||
sub r3,pc,#8 @ AES_encrypt
|
adr r3,AES_encrypt
|
||||||
stmdb sp!,{r1,r4-r12,lr}
|
stmdb sp!,{r1,r4-r12,lr}
|
||||||
mov r12,r0 @ inp
|
mov r12,r0 @ inp
|
||||||
mov r11,r2
|
mov r11,r2
|
||||||
|
@ -381,7 +381,7 @@ _armv4_AES_encrypt:
|
||||||
.align 5
|
.align 5
|
||||||
ENTRY(private_AES_set_encrypt_key)
|
ENTRY(private_AES_set_encrypt_key)
|
||||||
_armv4_AES_set_encrypt_key:
|
_armv4_AES_set_encrypt_key:
|
||||||
sub r3,pc,#8 @ AES_set_encrypt_key
|
adr r3,_armv4_AES_set_encrypt_key
|
||||||
teq r0,#0
|
teq r0,#0
|
||||||
moveq r0,#-1
|
moveq r0,#-1
|
||||||
beq .Labrt
|
beq .Labrt
|
||||||
|
@ -843,7 +843,7 @@ AES_Td:
|
||||||
@ const AES_KEY *key) {
|
@ const AES_KEY *key) {
|
||||||
.align 5
|
.align 5
|
||||||
ENTRY(AES_decrypt)
|
ENTRY(AES_decrypt)
|
||||||
sub r3,pc,#8 @ AES_decrypt
|
adr r3,AES_decrypt
|
||||||
stmdb sp!,{r1,r4-r12,lr}
|
stmdb sp!,{r1,r4-r12,lr}
|
||||||
mov r12,r0 @ inp
|
mov r12,r0 @ inp
|
||||||
mov r11,r2
|
mov r11,r2
|
||||||
|
|
|
@ -19,6 +19,13 @@
|
||||||
#include <asm/unified.h>
|
#include <asm/unified.h>
|
||||||
#include <asm/compiler.h>
|
#include <asm/compiler.h>
|
||||||
|
|
||||||
|
#if __LINUX_ARM_ARCH__ < 6
|
||||||
|
#include <asm-generic/uaccess-unaligned.h>
|
||||||
|
#else
|
||||||
|
#define __get_user_unaligned __get_user
|
||||||
|
#define __put_user_unaligned __put_user
|
||||||
|
#endif
|
||||||
|
|
||||||
#define VERIFY_READ 0
|
#define VERIFY_READ 0
|
||||||
#define VERIFY_WRITE 1
|
#define VERIFY_WRITE 1
|
||||||
|
|
||||||
|
|
|
@ -442,10 +442,10 @@ local_restart:
|
||||||
ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine
|
ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine
|
||||||
|
|
||||||
add r1, sp, #S_OFF
|
add r1, sp, #S_OFF
|
||||||
cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE)
|
2: cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE)
|
||||||
eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back
|
eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back
|
||||||
bcs arm_syscall
|
bcs arm_syscall
|
||||||
2: mov why, #0 @ no longer a real syscall
|
mov why, #0 @ no longer a real syscall
|
||||||
b sys_ni_syscall @ not private func
|
b sys_ni_syscall @ not private func
|
||||||
|
|
||||||
#if defined(CONFIG_OABI_COMPAT) || !defined(CONFIG_AEABI)
|
#if defined(CONFIG_OABI_COMPAT) || !defined(CONFIG_AEABI)
|
||||||
|
|
|
@ -329,10 +329,10 @@
|
||||||
#ifdef CONFIG_CONTEXT_TRACKING
|
#ifdef CONFIG_CONTEXT_TRACKING
|
||||||
.if \save
|
.if \save
|
||||||
stmdb sp!, {r0-r3, ip, lr}
|
stmdb sp!, {r0-r3, ip, lr}
|
||||||
bl user_exit
|
bl context_tracking_user_exit
|
||||||
ldmia sp!, {r0-r3, ip, lr}
|
ldmia sp!, {r0-r3, ip, lr}
|
||||||
.else
|
.else
|
||||||
bl user_exit
|
bl context_tracking_user_exit
|
||||||
.endif
|
.endif
|
||||||
#endif
|
#endif
|
||||||
.endm
|
.endm
|
||||||
|
@ -341,10 +341,10 @@
|
||||||
#ifdef CONFIG_CONTEXT_TRACKING
|
#ifdef CONFIG_CONTEXT_TRACKING
|
||||||
.if \save
|
.if \save
|
||||||
stmdb sp!, {r0-r3, ip, lr}
|
stmdb sp!, {r0-r3, ip, lr}
|
||||||
bl user_enter
|
bl context_tracking_user_enter
|
||||||
ldmia sp!, {r0-r3, ip, lr}
|
ldmia sp!, {r0-r3, ip, lr}
|
||||||
.else
|
.else
|
||||||
bl user_enter
|
bl context_tracking_user_enter
|
||||||
.endif
|
.endif
|
||||||
#endif
|
#endif
|
||||||
.endm
|
.endm
|
||||||
|
|
|
@ -58,14 +58,14 @@ static const struct kvm_irq_level a15_vtimer_irq = {
|
||||||
*/
|
*/
|
||||||
int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
||||||
{
|
{
|
||||||
struct kvm_regs *cpu_reset;
|
struct kvm_regs *reset_regs;
|
||||||
const struct kvm_irq_level *cpu_vtimer_irq;
|
const struct kvm_irq_level *cpu_vtimer_irq;
|
||||||
|
|
||||||
switch (vcpu->arch.target) {
|
switch (vcpu->arch.target) {
|
||||||
case KVM_ARM_TARGET_CORTEX_A15:
|
case KVM_ARM_TARGET_CORTEX_A15:
|
||||||
if (vcpu->vcpu_id > a15_max_cpu_idx)
|
if (vcpu->vcpu_id > a15_max_cpu_idx)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
cpu_reset = &a15_regs_reset;
|
reset_regs = &a15_regs_reset;
|
||||||
vcpu->arch.midr = read_cpuid_id();
|
vcpu->arch.midr = read_cpuid_id();
|
||||||
cpu_vtimer_irq = &a15_vtimer_irq;
|
cpu_vtimer_irq = &a15_vtimer_irq;
|
||||||
break;
|
break;
|
||||||
|
@ -74,7 +74,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Reset core registers */
|
/* Reset core registers */
|
||||||
memcpy(&vcpu->arch.regs, cpu_reset, sizeof(vcpu->arch.regs));
|
memcpy(&vcpu->arch.regs, reset_regs, sizeof(vcpu->arch.regs));
|
||||||
|
|
||||||
/* Reset CP15 registers */
|
/* Reset CP15 registers */
|
||||||
kvm_reset_coprocs(vcpu);
|
kvm_reset_coprocs(vcpu);
|
||||||
|
|
|
@ -93,7 +93,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
|
||||||
|
|
||||||
static struct irqaction at91rm9200_timer_irq = {
|
static struct irqaction at91rm9200_timer_irq = {
|
||||||
.name = "at91_tick",
|
.name = "at91_tick",
|
||||||
.flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
.flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||||
.handler = at91rm9200_timer_interrupt,
|
.handler = at91rm9200_timer_interrupt,
|
||||||
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
||||||
};
|
};
|
||||||
|
|
|
@ -171,7 +171,7 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
|
||||||
|
|
||||||
static struct irqaction at91sam926x_pit_irq = {
|
static struct irqaction at91sam926x_pit_irq = {
|
||||||
.name = "at91_tick",
|
.name = "at91_tick",
|
||||||
.flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
.flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||||
.handler = at91sam926x_pit_interrupt,
|
.handler = at91sam926x_pit_interrupt,
|
||||||
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
||||||
};
|
};
|
||||||
|
|
|
@ -16,11 +16,17 @@
|
||||||
#include "at91_rstc.h"
|
#include "at91_rstc.h"
|
||||||
.arm
|
.arm
|
||||||
|
|
||||||
|
/*
|
||||||
|
* at91_ramc_base is an array void*
|
||||||
|
* init at NULL if only one DDR controler is present in or DT
|
||||||
|
*/
|
||||||
.globl at91sam9g45_restart
|
.globl at91sam9g45_restart
|
||||||
|
|
||||||
at91sam9g45_restart:
|
at91sam9g45_restart:
|
||||||
ldr r5, =at91_ramc_base @ preload constants
|
ldr r5, =at91_ramc_base @ preload constants
|
||||||
ldr r0, [r5]
|
ldr r0, [r5]
|
||||||
|
ldr r5, [r5, #4] @ ddr1
|
||||||
|
cmp r5, #0
|
||||||
ldr r4, =at91_rstc_base
|
ldr r4, =at91_rstc_base
|
||||||
ldr r1, [r4]
|
ldr r1, [r4]
|
||||||
|
|
||||||
|
@ -30,6 +36,8 @@ at91sam9g45_restart:
|
||||||
|
|
||||||
.balign 32 @ align to cache line
|
.balign 32 @ align to cache line
|
||||||
|
|
||||||
|
strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access
|
||||||
|
strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1
|
||||||
str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
|
str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
|
||||||
str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
|
str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
|
||||||
str r4, [r1, #AT91_RSTC_CR] @ reset processor
|
str r4, [r1, #AT91_RSTC_CR] @ reset processor
|
||||||
|
|
|
@ -57,7 +57,7 @@ static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
|
||||||
|
|
||||||
static struct irqaction at91x40_timer_irq = {
|
static struct irqaction at91x40_timer_irq = {
|
||||||
.name = "at91_tick",
|
.name = "at91_tick",
|
||||||
.flags = IRQF_DISABLED | IRQF_TIMER,
|
.flags = IRQF_TIMER,
|
||||||
.handler = at91x40_timer_interrupt
|
.handler = at91x40_timer_interrupt
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -176,7 +176,7 @@ static struct at24_platform_data eeprom_info = {
|
||||||
.context = (void *)0x7f00,
|
.context = (void *)0x7f00,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct snd_platform_data dm365_evm_snd_data = {
|
static struct snd_platform_data dm365_evm_snd_data __maybe_unused = {
|
||||||
.asp_chan_q = EVENTQ_3,
|
.asp_chan_q = EVENTQ_3,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -15,8 +15,6 @@
|
||||||
|
|
||||||
#include <mach/hardware.h>
|
#include <mach/hardware.h>
|
||||||
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
|
|
||||||
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
|
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
|
||||||
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
|
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
|
||||||
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
|
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
|
||||||
|
@ -39,6 +37,8 @@
|
||||||
#define UART_DM646X_SCR_TX_WATERMARK 0x08
|
#define UART_DM646X_SCR_TX_WATERMARK 0x08
|
||||||
|
|
||||||
#ifndef __ASSEMBLY__
|
#ifndef __ASSEMBLY__
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
|
||||||
extern int davinci_serial_init(struct platform_device *);
|
extern int davinci_serial_init(struct platform_device *);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -1,2 +1,9 @@
|
||||||
/* Simple oneliner include to the PCIv3 early init */
|
/* Simple oneliner include to the PCIv3 early init */
|
||||||
|
#ifdef CONFIG_PCI
|
||||||
extern int pci_v3_early_init(void);
|
extern int pci_v3_early_init(void);
|
||||||
|
#else
|
||||||
|
static inline int pci_v3_early_init(void)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
|
@ -140,6 +140,7 @@ int __init coherency_init(void)
|
||||||
coherency_base = of_iomap(np, 0);
|
coherency_base = of_iomap(np, 0);
|
||||||
coherency_cpu_base = of_iomap(np, 1);
|
coherency_cpu_base = of_iomap(np, 1);
|
||||||
set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
|
set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
|
||||||
|
of_node_put(np);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -147,9 +148,14 @@ int __init coherency_init(void)
|
||||||
|
|
||||||
static int __init coherency_late_init(void)
|
static int __init coherency_late_init(void)
|
||||||
{
|
{
|
||||||
if (of_find_matching_node(NULL, of_coherency_table))
|
struct device_node *np;
|
||||||
|
|
||||||
|
np = of_find_matching_node(NULL, of_coherency_table);
|
||||||
|
if (np) {
|
||||||
bus_register_notifier(&platform_bus_type,
|
bus_register_notifier(&platform_bus_type,
|
||||||
&mvebu_hwcc_platform_nb);
|
&mvebu_hwcc_platform_nb);
|
||||||
|
of_node_put(np);
|
||||||
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -67,6 +67,7 @@ int __init armada_370_xp_pmsu_init(void)
|
||||||
pr_info("Initializing Power Management Service Unit\n");
|
pr_info("Initializing Power Management Service Unit\n");
|
||||||
pmsu_mp_base = of_iomap(np, 0);
|
pmsu_mp_base = of_iomap(np, 0);
|
||||||
pmsu_reset_base = of_iomap(np, 1);
|
pmsu_reset_base = of_iomap(np, 1);
|
||||||
|
of_node_put(np);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -98,6 +98,7 @@ static int __init mvebu_system_controller_init(void)
|
||||||
BUG_ON(!match);
|
BUG_ON(!match);
|
||||||
system_controller_base = of_iomap(np, 0);
|
system_controller_base = of_iomap(np, 0);
|
||||||
mvebu_sc = (struct mvebu_system_controller *)match->data;
|
mvebu_sc = (struct mvebu_system_controller *)match->data;
|
||||||
|
of_node_put(np);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -52,7 +52,7 @@ static bool omap2xxx_clk_apll_locked(struct clk_hw *hw)
|
||||||
|
|
||||||
apll_mask = EN_APLL_LOCKED << clk->enable_bit;
|
apll_mask = EN_APLL_LOCKED << clk->enable_bit;
|
||||||
|
|
||||||
r = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
|
r = omap2xxx_cm_get_pll_status();
|
||||||
|
|
||||||
return ((r & apll_mask) == apll_mask) ? true : false;
|
return ((r & apll_mask) == apll_mask) ? true : false;
|
||||||
}
|
}
|
||||||
|
@ -126,7 +126,7 @@ u32 omap2xxx_get_apll_clkin(void)
|
||||||
{
|
{
|
||||||
u32 aplls, srate = 0;
|
u32 aplls, srate = 0;
|
||||||
|
|
||||||
aplls = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
|
aplls = omap2xxx_cm_get_pll_config();
|
||||||
aplls &= OMAP24XX_APLLS_CLKIN_MASK;
|
aplls &= OMAP24XX_APLLS_CLKIN_MASK;
|
||||||
aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT;
|
aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT;
|
||||||
|
|
||||||
|
|
|
@ -60,8 +60,7 @@ unsigned long omap2xxx_clk_get_core_rate(void)
|
||||||
|
|
||||||
core_clk = omap2_get_dpll_rate(dpll_core_ck);
|
core_clk = omap2_get_dpll_rate(dpll_core_ck);
|
||||||
|
|
||||||
v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
|
v = omap2xxx_cm_get_core_clk_src();
|
||||||
v &= OMAP24XX_CORE_CLK_SRC_MASK;
|
|
||||||
|
|
||||||
if (v == CORE_CLK_SRC_32K)
|
if (v == CORE_CLK_SRC_32K)
|
||||||
core_clk = 32768;
|
core_clk = 32768;
|
||||||
|
@ -79,8 +78,7 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate)
|
||||||
{
|
{
|
||||||
u32 high, low, core_clk_src;
|
u32 high, low, core_clk_src;
|
||||||
|
|
||||||
core_clk_src = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
|
core_clk_src = omap2xxx_cm_get_core_clk_src();
|
||||||
core_clk_src &= OMAP24XX_CORE_CLK_SRC_MASK;
|
|
||||||
|
|
||||||
if (core_clk_src == CORE_CLK_SRC_DPLL) { /* DPLL clockout */
|
if (core_clk_src == CORE_CLK_SRC_DPLL) { /* DPLL clockout */
|
||||||
high = curr_prcm_set->dpll_speed * 2;
|
high = curr_prcm_set->dpll_speed * 2;
|
||||||
|
@ -120,8 +118,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate,
|
||||||
const struct dpll_data *dd;
|
const struct dpll_data *dd;
|
||||||
|
|
||||||
cur_rate = omap2xxx_clk_get_core_rate();
|
cur_rate = omap2xxx_clk_get_core_rate();
|
||||||
mult = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
|
mult = omap2xxx_cm_get_core_clk_src();
|
||||||
mult &= OMAP24XX_CORE_CLK_SRC_MASK;
|
|
||||||
|
|
||||||
if ((rate == (cur_rate / 2)) && (mult == 2)) {
|
if ((rate == (cur_rate / 2)) && (mult == 2)) {
|
||||||
omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1);
|
omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1);
|
||||||
|
@ -145,7 +142,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate,
|
||||||
tmpset.cm_clksel1_pll &= ~(dd->mult_mask |
|
tmpset.cm_clksel1_pll &= ~(dd->mult_mask |
|
||||||
dd->div1_mask);
|
dd->div1_mask);
|
||||||
div = ((curr_prcm_set->xtal_speed / 1000000) - 1);
|
div = ((curr_prcm_set->xtal_speed / 1000000) - 1);
|
||||||
tmpset.cm_clksel2_pll = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
|
tmpset.cm_clksel2_pll = omap2xxx_cm_get_core_pll_config();
|
||||||
tmpset.cm_clksel2_pll &= ~OMAP24XX_CORE_CLK_SRC_MASK;
|
tmpset.cm_clksel2_pll &= ~OMAP24XX_CORE_CLK_SRC_MASK;
|
||||||
if (rate > low) {
|
if (rate > low) {
|
||||||
tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL_X2;
|
tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL_X2;
|
||||||
|
|
|
@ -98,7 +98,7 @@ long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate,
|
||||||
int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate,
|
int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate,
|
||||||
unsigned long parent_rate)
|
unsigned long parent_rate)
|
||||||
{
|
{
|
||||||
u32 cur_rate, done_rate, bypass = 0, tmp;
|
u32 cur_rate, done_rate, bypass = 0;
|
||||||
const struct prcm_config *prcm;
|
const struct prcm_config *prcm;
|
||||||
unsigned long found_speed = 0;
|
unsigned long found_speed = 0;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
@ -141,23 +141,11 @@ int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate,
|
||||||
else
|
else
|
||||||
done_rate = CORE_CLK_SRC_DPLL;
|
done_rate = CORE_CLK_SRC_DPLL;
|
||||||
|
|
||||||
/* MPU divider */
|
omap2xxx_cm_set_mod_dividers(prcm->cm_clksel_mpu,
|
||||||
omap2_cm_write_mod_reg(prcm->cm_clksel_mpu, MPU_MOD, CM_CLKSEL);
|
prcm->cm_clksel_dsp,
|
||||||
|
prcm->cm_clksel_gfx,
|
||||||
/* dsp + iva1 div(2420), iva2.1(2430) */
|
prcm->cm_clksel1_core,
|
||||||
omap2_cm_write_mod_reg(prcm->cm_clksel_dsp,
|
prcm->cm_clksel_mdm);
|
||||||
OMAP24XX_DSP_MOD, CM_CLKSEL);
|
|
||||||
|
|
||||||
omap2_cm_write_mod_reg(prcm->cm_clksel_gfx, GFX_MOD, CM_CLKSEL);
|
|
||||||
|
|
||||||
/* Major subsystem dividers */
|
|
||||||
tmp = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & OMAP24XX_CLKSEL_DSS2_MASK;
|
|
||||||
omap2_cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD,
|
|
||||||
CM_CLKSEL1);
|
|
||||||
|
|
||||||
if (cpu_is_omap2430())
|
|
||||||
omap2_cm_write_mod_reg(prcm->cm_clksel_mdm,
|
|
||||||
OMAP2430_MDM_MOD, CM_CLKSEL);
|
|
||||||
|
|
||||||
/* x2 to enter omap2xxx_sdrc_init_params() */
|
/* x2 to enter omap2xxx_sdrc_init_params() */
|
||||||
omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
|
omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
|
||||||
|
|
|
@ -542,6 +542,44 @@ int omap2_clk_disable_autoidle_all(void)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* omap2_clk_deny_idle - disable autoidle on an OMAP clock
|
||||||
|
* @clk: struct clk * to disable autoidle for
|
||||||
|
*
|
||||||
|
* Disable autoidle on an OMAP clock.
|
||||||
|
*/
|
||||||
|
int omap2_clk_deny_idle(struct clk *clk)
|
||||||
|
{
|
||||||
|
struct clk_hw_omap *c;
|
||||||
|
|
||||||
|
if (__clk_get_flags(clk) & CLK_IS_BASIC)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
c = to_clk_hw_omap(__clk_get_hw(clk));
|
||||||
|
if (c->ops && c->ops->deny_idle)
|
||||||
|
c->ops->deny_idle(c);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* omap2_clk_allow_idle - enable autoidle on an OMAP clock
|
||||||
|
* @clk: struct clk * to enable autoidle for
|
||||||
|
*
|
||||||
|
* Enable autoidle on an OMAP clock.
|
||||||
|
*/
|
||||||
|
int omap2_clk_allow_idle(struct clk *clk)
|
||||||
|
{
|
||||||
|
struct clk_hw_omap *c;
|
||||||
|
|
||||||
|
if (__clk_get_flags(clk) & CLK_IS_BASIC)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
c = to_clk_hw_omap(__clk_get_hw(clk));
|
||||||
|
if (c->ops && c->ops->allow_idle)
|
||||||
|
c->ops->allow_idle(c);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* omap2_clk_enable_init_clocks - prepare & enable a list of clocks
|
* omap2_clk_enable_init_clocks - prepare & enable a list of clocks
|
||||||
* @clk_names: ptr to an array of strings of clock names to enable
|
* @clk_names: ptr to an array of strings of clock names to enable
|
||||||
|
|
|
@ -411,6 +411,8 @@ void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
|
||||||
void omap2_init_clk_hw_omap_clocks(struct clk *clk);
|
void omap2_init_clk_hw_omap_clocks(struct clk *clk);
|
||||||
int omap2_clk_enable_autoidle_all(void);
|
int omap2_clk_enable_autoidle_all(void);
|
||||||
int omap2_clk_disable_autoidle_all(void);
|
int omap2_clk_disable_autoidle_all(void);
|
||||||
|
int omap2_clk_allow_idle(struct clk *clk);
|
||||||
|
int omap2_clk_deny_idle(struct clk *clk);
|
||||||
void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks);
|
void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks);
|
||||||
int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
|
int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
|
||||||
void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
|
void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
|
||||||
|
|
|
@ -327,6 +327,73 @@ struct clkdm_ops omap2_clkdm_operations = {
|
||||||
.clkdm_clk_disable = omap2xxx_clkdm_clk_disable,
|
.clkdm_clk_disable = omap2xxx_clkdm_clk_disable,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
int omap2xxx_cm_fclks_active(void)
|
||||||
|
{
|
||||||
|
u32 f1, f2;
|
||||||
|
|
||||||
|
f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
|
||||||
|
f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
|
||||||
|
|
||||||
|
return (f1 | f2) ? 1 : 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int omap2xxx_cm_mpu_retention_allowed(void)
|
||||||
|
{
|
||||||
|
u32 l;
|
||||||
|
|
||||||
|
/* Check for MMC, UART2, UART1, McSPI2, McSPI1 and DSS1. */
|
||||||
|
l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
|
||||||
|
if (l & (OMAP2420_EN_MMC_MASK | OMAP24XX_EN_UART2_MASK |
|
||||||
|
OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_MCSPI2_MASK |
|
||||||
|
OMAP24XX_EN_MCSPI1_MASK | OMAP24XX_EN_DSS1_MASK))
|
||||||
|
return 0;
|
||||||
|
/* Check for UART3. */
|
||||||
|
l = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
|
||||||
|
if (l & OMAP24XX_EN_UART3_MASK)
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
u32 omap2xxx_cm_get_core_clk_src(void)
|
||||||
|
{
|
||||||
|
u32 v;
|
||||||
|
|
||||||
|
v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
|
||||||
|
v &= OMAP24XX_CORE_CLK_SRC_MASK;
|
||||||
|
|
||||||
|
return v;
|
||||||
|
}
|
||||||
|
|
||||||
|
u32 omap2xxx_cm_get_core_pll_config(void)
|
||||||
|
{
|
||||||
|
return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
|
||||||
|
}
|
||||||
|
|
||||||
|
u32 omap2xxx_cm_get_pll_config(void)
|
||||||
|
{
|
||||||
|
return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
|
||||||
|
}
|
||||||
|
|
||||||
|
u32 omap2xxx_cm_get_pll_status(void)
|
||||||
|
{
|
||||||
|
return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
|
||||||
|
}
|
||||||
|
|
||||||
|
void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm)
|
||||||
|
{
|
||||||
|
u32 tmp;
|
||||||
|
|
||||||
|
omap2_cm_write_mod_reg(mpu, MPU_MOD, CM_CLKSEL);
|
||||||
|
omap2_cm_write_mod_reg(dsp, OMAP24XX_DSP_MOD, CM_CLKSEL);
|
||||||
|
omap2_cm_write_mod_reg(gfx, GFX_MOD, CM_CLKSEL);
|
||||||
|
tmp = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) &
|
||||||
|
OMAP24XX_CLKSEL_DSS2_MASK;
|
||||||
|
omap2_cm_write_mod_reg(core | tmp, CORE_MOD, CM_CLKSEL1);
|
||||||
|
if (cpu_is_omap2430())
|
||||||
|
omap2_cm_write_mod_reg(mdm, OMAP2430_MDM_MOD, CM_CLKSEL);
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -62,6 +62,14 @@ extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
|
||||||
u8 idlest_shift);
|
u8 idlest_shift);
|
||||||
extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
|
extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
|
||||||
s16 *prcm_inst, u8 *idlest_reg_id);
|
s16 *prcm_inst, u8 *idlest_reg_id);
|
||||||
|
extern int omap2xxx_cm_fclks_active(void);
|
||||||
|
extern int omap2xxx_cm_mpu_retention_allowed(void);
|
||||||
|
extern u32 omap2xxx_cm_get_core_clk_src(void);
|
||||||
|
extern u32 omap2xxx_cm_get_core_pll_config(void);
|
||||||
|
extern u32 omap2xxx_cm_get_pll_config(void);
|
||||||
|
extern u32 omap2xxx_cm_get_pll_status(void);
|
||||||
|
extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,
|
||||||
|
u32 mdm);
|
||||||
|
|
||||||
extern int __init omap2xxx_cm_init(void);
|
extern int __init omap2xxx_cm_init(void);
|
||||||
|
|
||||||
|
|
|
@ -636,6 +636,28 @@ void omap3_cm_restore_context(void)
|
||||||
OMAP3_CM_CLKOUT_CTRL_OFFSET);
|
OMAP3_CM_CLKOUT_CTRL_OFFSET);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void omap3_cm_save_scratchpad_contents(u32 *ptr)
|
||||||
|
{
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL);
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* As per erratum i671, ROM code does not respect the PER DPLL
|
||||||
|
* programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1.
|
||||||
|
* Then, in anycase, clear these bits to avoid extra latencies.
|
||||||
|
*/
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) &
|
||||||
|
~OMAP3430_AUTO_PERIPH_DPLL_MASK;
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL);
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3);
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL);
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL);
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL);
|
||||||
|
*ptr++ = omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL);
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -83,6 +83,7 @@ extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
|
||||||
|
|
||||||
extern void omap3_cm_save_context(void);
|
extern void omap3_cm_save_context(void);
|
||||||
extern void omap3_cm_restore_context(void);
|
extern void omap3_cm_restore_context(void);
|
||||||
|
extern void omap3_cm_save_scratchpad_contents(u32 *ptr);
|
||||||
|
|
||||||
extern int __init omap3xxx_cm_init(void);
|
extern int __init omap3xxx_cm_init(void);
|
||||||
|
|
||||||
|
|
|
@ -46,17 +46,7 @@ struct omap3_scratchpad {
|
||||||
struct omap3_scratchpad_prcm_block {
|
struct omap3_scratchpad_prcm_block {
|
||||||
u32 prm_clksrc_ctrl;
|
u32 prm_clksrc_ctrl;
|
||||||
u32 prm_clksel;
|
u32 prm_clksel;
|
||||||
u32 cm_clksel_core;
|
u32 cm_contents[11];
|
||||||
u32 cm_clksel_wkup;
|
|
||||||
u32 cm_clken_pll;
|
|
||||||
u32 cm_autoidle_pll;
|
|
||||||
u32 cm_clksel1_pll;
|
|
||||||
u32 cm_clksel2_pll;
|
|
||||||
u32 cm_clksel3_pll;
|
|
||||||
u32 cm_clken_pll_mpu;
|
|
||||||
u32 cm_autoidle_pll_mpu;
|
|
||||||
u32 cm_clksel1_pll_mpu;
|
|
||||||
u32 cm_clksel2_pll_mpu;
|
|
||||||
u32 prcm_block_size;
|
u32 prcm_block_size;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -347,34 +337,9 @@ void omap3_save_scratchpad_contents(void)
|
||||||
prcm_block_contents.prm_clksel =
|
prcm_block_contents.prm_clksel =
|
||||||
omap2_prm_read_mod_reg(OMAP3430_CCR_MOD,
|
omap2_prm_read_mod_reg(OMAP3430_CCR_MOD,
|
||||||
OMAP3_PRM_CLKSEL_OFFSET);
|
OMAP3_PRM_CLKSEL_OFFSET);
|
||||||
prcm_block_contents.cm_clksel_core =
|
|
||||||
omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL);
|
omap3_cm_save_scratchpad_contents(prcm_block_contents.cm_contents);
|
||||||
prcm_block_contents.cm_clksel_wkup =
|
|
||||||
omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
|
|
||||||
prcm_block_contents.cm_clken_pll =
|
|
||||||
omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
|
|
||||||
/*
|
|
||||||
* As per erratum i671, ROM code does not respect the PER DPLL
|
|
||||||
* programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1.
|
|
||||||
* Then, in anycase, clear these bits to avoid extra latencies.
|
|
||||||
*/
|
|
||||||
prcm_block_contents.cm_autoidle_pll =
|
|
||||||
omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) &
|
|
||||||
~OMAP3430_AUTO_PERIPH_DPLL_MASK;
|
|
||||||
prcm_block_contents.cm_clksel1_pll =
|
|
||||||
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
|
|
||||||
prcm_block_contents.cm_clksel2_pll =
|
|
||||||
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL);
|
|
||||||
prcm_block_contents.cm_clksel3_pll =
|
|
||||||
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3);
|
|
||||||
prcm_block_contents.cm_clken_pll_mpu =
|
|
||||||
omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL);
|
|
||||||
prcm_block_contents.cm_autoidle_pll_mpu =
|
|
||||||
omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL);
|
|
||||||
prcm_block_contents.cm_clksel1_pll_mpu =
|
|
||||||
omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL);
|
|
||||||
prcm_block_contents.cm_clksel2_pll_mpu =
|
|
||||||
omap2_cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL);
|
|
||||||
prcm_block_contents.prcm_block_size = 0x0;
|
prcm_block_contents.prcm_block_size = 0x0;
|
||||||
|
|
||||||
/* Populate the SDRC block contents */
|
/* Populate the SDRC block contents */
|
||||||
|
@ -604,4 +569,15 @@ int omap3_ctrl_save_padconf(void)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* omap3_ctrl_set_iva_bootmode_idle - sets the IVA2 bootmode to idle
|
||||||
|
*
|
||||||
|
* Sets the bootmode for IVA2 to idle. This is needed by the PM code to
|
||||||
|
* force disable IVA2 so that it does not prevent any low-power states.
|
||||||
|
*/
|
||||||
|
void omap3_ctrl_set_iva_bootmode_idle(void)
|
||||||
|
{
|
||||||
|
omap_ctrl_writel(OMAP3_IVA2_BOOTMOD_IDLE,
|
||||||
|
OMAP343X_CONTROL_IVA2_BOOTMOD);
|
||||||
|
}
|
||||||
#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
|
#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */
|
||||||
|
|
|
@ -427,6 +427,7 @@ extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr);
|
||||||
extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
|
extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
|
||||||
extern void omap3630_ctrl_disable_rta(void);
|
extern void omap3630_ctrl_disable_rta(void);
|
||||||
extern int omap3_ctrl_save_padconf(void);
|
extern int omap3_ctrl_save_padconf(void);
|
||||||
|
extern void omap3_ctrl_set_iva_bootmode_idle(void);
|
||||||
extern void omap2_set_globals_control(void __iomem *ctrl,
|
extern void omap2_set_globals_control(void __iomem *ctrl,
|
||||||
void __iomem *ctrl_pad);
|
void __iomem *ctrl_pad);
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -25,6 +25,7 @@
|
||||||
|
|
||||||
#include "soc.h"
|
#include "soc.h"
|
||||||
#include "omap_device.h"
|
#include "omap_device.h"
|
||||||
|
#include "clock.h"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
|
* FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
|
||||||
|
@ -33,22 +34,18 @@
|
||||||
#include "cm3xxx.h"
|
#include "cm3xxx.h"
|
||||||
#include "cm-regbits-34xx.h"
|
#include "cm-regbits-34xx.h"
|
||||||
|
|
||||||
|
static struct clk *mcbsp_iclks[5];
|
||||||
|
|
||||||
static int omap3_enable_st_clock(unsigned int id, bool enable)
|
static int omap3_enable_st_clock(unsigned int id, bool enable)
|
||||||
{
|
{
|
||||||
unsigned int w;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Sidetone uses McBSP ICLK - which must not idle when sidetones
|
* Sidetone uses McBSP ICLK - which must not idle when sidetones
|
||||||
* are enabled or sidetones start sounding ugly.
|
* are enabled or sidetones start sounding ugly.
|
||||||
*/
|
*/
|
||||||
w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
|
|
||||||
if (enable)
|
if (enable)
|
||||||
w &= ~(1 << (id - 2));
|
return omap2_clk_deny_idle(mcbsp_iclks[id]);
|
||||||
else
|
else
|
||||||
w |= 1 << (id - 2);
|
return omap2_clk_allow_idle(mcbsp_iclks[id]);
|
||||||
omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
|
static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
|
||||||
|
@ -58,6 +55,7 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
|
||||||
struct omap_hwmod *oh_device[2];
|
struct omap_hwmod *oh_device[2];
|
||||||
struct omap_mcbsp_platform_data *pdata = NULL;
|
struct omap_mcbsp_platform_data *pdata = NULL;
|
||||||
struct platform_device *pdev;
|
struct platform_device *pdev;
|
||||||
|
char clk_name[11];
|
||||||
|
|
||||||
sscanf(oh->name, "mcbsp%d", &id);
|
sscanf(oh->name, "mcbsp%d", &id);
|
||||||
|
|
||||||
|
@ -99,6 +97,8 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
|
||||||
oh_device[1] = omap_hwmod_lookup((
|
oh_device[1] = omap_hwmod_lookup((
|
||||||
(struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
|
(struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone);
|
||||||
pdata->enable_st_clock = omap3_enable_st_clock;
|
pdata->enable_st_clock = omap3_enable_st_clock;
|
||||||
|
sprintf(clk_name, "mcbsp%d_ick", id);
|
||||||
|
mcbsp_iclks[id] = clk_get(NULL, clk_name);
|
||||||
count++;
|
count++;
|
||||||
}
|
}
|
||||||
pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
|
pdev = omap_device_build_ss(name, id, oh_device, count, pdata,
|
||||||
|
|
|
@ -62,16 +62,6 @@ static struct clockdomain *dsp_clkdm, *mpu_clkdm, *wkup_clkdm, *gfx_clkdm;
|
||||||
|
|
||||||
static struct clk *osc_ck, *emul_ck;
|
static struct clk *osc_ck, *emul_ck;
|
||||||
|
|
||||||
static int omap2_fclks_active(void)
|
|
||||||
{
|
|
||||||
u32 f1, f2;
|
|
||||||
|
|
||||||
f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
|
|
||||||
f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
|
|
||||||
|
|
||||||
return (f1 | f2) ? 1 : 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int omap2_enter_full_retention(void)
|
static int omap2_enter_full_retention(void)
|
||||||
{
|
{
|
||||||
u32 l;
|
u32 l;
|
||||||
|
@ -142,17 +132,7 @@ static int sti_console_enabled;
|
||||||
|
|
||||||
static int omap2_allow_mpu_retention(void)
|
static int omap2_allow_mpu_retention(void)
|
||||||
{
|
{
|
||||||
u32 l;
|
if (!omap2xxx_cm_mpu_retention_allowed())
|
||||||
|
|
||||||
/* Check for MMC, UART2, UART1, McSPI2, McSPI1 and DSS1. */
|
|
||||||
l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
|
|
||||||
if (l & (OMAP2420_EN_MMC_MASK | OMAP24XX_EN_UART2_MASK |
|
|
||||||
OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_MCSPI2_MASK |
|
|
||||||
OMAP24XX_EN_MCSPI1_MASK | OMAP24XX_EN_DSS1_MASK))
|
|
||||||
return 0;
|
|
||||||
/* Check for UART3. */
|
|
||||||
l = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
|
|
||||||
if (l & OMAP24XX_EN_UART3_MASK)
|
|
||||||
return 0;
|
return 0;
|
||||||
if (sti_console_enabled)
|
if (sti_console_enabled)
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -188,7 +168,7 @@ static void omap2_enter_mpu_retention(void)
|
||||||
|
|
||||||
static int omap2_can_sleep(void)
|
static int omap2_can_sleep(void)
|
||||||
{
|
{
|
||||||
if (omap2_fclks_active())
|
if (omap2xxx_cm_fclks_active())
|
||||||
return 0;
|
return 0;
|
||||||
if (__clk_is_enabled(osc_ck))
|
if (__clk_is_enabled(osc_ck))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -430,8 +430,7 @@ static void __init omap3_iva_idle(void)
|
||||||
OMAP3430_IVA2_MOD, CM_FCLKEN);
|
OMAP3430_IVA2_MOD, CM_FCLKEN);
|
||||||
|
|
||||||
/* Set IVA2 boot mode to 'idle' */
|
/* Set IVA2 boot mode to 'idle' */
|
||||||
omap_ctrl_writel(OMAP3_IVA2_BOOTMOD_IDLE,
|
omap3_ctrl_set_iva_bootmode_idle();
|
||||||
OMAP343X_CONTROL_IVA2_BOOTMOD);
|
|
||||||
|
|
||||||
/* Un-reset IVA2 */
|
/* Un-reset IVA2 */
|
||||||
omap2_prm_write_mod_reg(0, OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL);
|
omap2_prm_write_mod_reg(0, OMAP3430_IVA2_MOD, OMAP2_RM_RSTCTRL);
|
||||||
|
|
|
@ -131,6 +131,16 @@ static void tc2_pm_down(u64 residency)
|
||||||
} else
|
} else
|
||||||
BUG();
|
BUG();
|
||||||
|
|
||||||
|
/*
|
||||||
|
* If the CPU is committed to power down, make sure
|
||||||
|
* the power controller will be in charge of waking it
|
||||||
|
* up upon IRQ, ie IRQ lines are cut from GIC CPU IF
|
||||||
|
* to the CPU by disabling the GIC CPU IF to prevent wfi
|
||||||
|
* from completing execution behind power controller back
|
||||||
|
*/
|
||||||
|
if (!skip_wfi)
|
||||||
|
gic_cpu_if_down();
|
||||||
|
|
||||||
if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) {
|
if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) {
|
||||||
arch_spin_unlock(&tc2_pm_lock);
|
arch_spin_unlock(&tc2_pm_lock);
|
||||||
|
|
||||||
|
@ -231,7 +241,6 @@ static void tc2_pm_suspend(u64 residency)
|
||||||
cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
|
cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
|
||||||
cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
|
cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
|
||||||
ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point));
|
ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point));
|
||||||
gic_cpu_if_down();
|
|
||||||
tc2_pm_down(residency);
|
tc2_pm_down(residency);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -6,13 +6,6 @@ config FRAME_POINTER
|
||||||
bool
|
bool
|
||||||
default y
|
default y
|
||||||
|
|
||||||
config DEBUG_STACK_USAGE
|
|
||||||
bool "Enable stack utilization instrumentation"
|
|
||||||
depends on DEBUG_KERNEL
|
|
||||||
help
|
|
||||||
Enables the display of the minimum amount of free stack which each
|
|
||||||
task has ever had available in the sysrq-T output.
|
|
||||||
|
|
||||||
config EARLY_PRINTK
|
config EARLY_PRINTK
|
||||||
bool "Early printk support"
|
bool "Early printk support"
|
||||||
default y
|
default y
|
||||||
|
|
|
@ -42,7 +42,7 @@ CONFIG_IP_PNP_BOOTP=y
|
||||||
# CONFIG_WIRELESS is not set
|
# CONFIG_WIRELESS is not set
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
CONFIG_DEVTMPFS=y
|
CONFIG_DEVTMPFS=y
|
||||||
# CONFIG_BLK_DEV is not set
|
CONFIG_BLK_DEV=y
|
||||||
CONFIG_SCSI=y
|
CONFIG_SCSI=y
|
||||||
# CONFIG_SCSI_PROC_FS is not set
|
# CONFIG_SCSI_PROC_FS is not set
|
||||||
CONFIG_BLK_DEV_SD=y
|
CONFIG_BLK_DEV_SD=y
|
||||||
|
@ -72,6 +72,7 @@ CONFIG_LOGO=y
|
||||||
# CONFIG_IOMMU_SUPPORT is not set
|
# CONFIG_IOMMU_SUPPORT is not set
|
||||||
CONFIG_EXT2_FS=y
|
CONFIG_EXT2_FS=y
|
||||||
CONFIG_EXT3_FS=y
|
CONFIG_EXT3_FS=y
|
||||||
|
CONFIG_EXT4_FS=y
|
||||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||||
# CONFIG_EXT3_FS_XATTR is not set
|
# CONFIG_EXT3_FS_XATTR is not set
|
||||||
CONFIG_FUSE_FS=y
|
CONFIG_FUSE_FS=y
|
||||||
|
@ -90,3 +91,5 @@ CONFIG_DEBUG_KERNEL=y
|
||||||
CONFIG_DEBUG_INFO=y
|
CONFIG_DEBUG_INFO=y
|
||||||
# CONFIG_FTRACE is not set
|
# CONFIG_FTRACE is not set
|
||||||
CONFIG_ATOMIC64_SELFTEST=y
|
CONFIG_ATOMIC64_SELFTEST=y
|
||||||
|
CONFIG_VIRTIO_MMIO=y
|
||||||
|
CONFIG_VIRTIO_BLK=y
|
||||||
|
|
|
@ -166,9 +166,10 @@ do { \
|
||||||
|
|
||||||
#define get_user(x, ptr) \
|
#define get_user(x, ptr) \
|
||||||
({ \
|
({ \
|
||||||
|
__typeof__(*(ptr)) __user *__p = (ptr); \
|
||||||
might_fault(); \
|
might_fault(); \
|
||||||
access_ok(VERIFY_READ, (ptr), sizeof(*(ptr))) ? \
|
access_ok(VERIFY_READ, __p, sizeof(*__p)) ? \
|
||||||
__get_user((x), (ptr)) : \
|
__get_user((x), __p) : \
|
||||||
((x) = 0, -EFAULT); \
|
((x) = 0, -EFAULT); \
|
||||||
})
|
})
|
||||||
|
|
||||||
|
@ -227,9 +228,10 @@ do { \
|
||||||
|
|
||||||
#define put_user(x, ptr) \
|
#define put_user(x, ptr) \
|
||||||
({ \
|
({ \
|
||||||
|
__typeof__(*(ptr)) __user *__p = (ptr); \
|
||||||
might_fault(); \
|
might_fault(); \
|
||||||
access_ok(VERIFY_WRITE, (ptr), sizeof(*(ptr))) ? \
|
access_ok(VERIFY_WRITE, __p, sizeof(*__p)) ? \
|
||||||
__put_user((x), (ptr)) : \
|
__put_user((x), __p) : \
|
||||||
-EFAULT; \
|
-EFAULT; \
|
||||||
})
|
})
|
||||||
|
|
||||||
|
|
|
@ -80,8 +80,10 @@ void fpsimd_thread_switch(struct task_struct *next)
|
||||||
|
|
||||||
void fpsimd_flush_thread(void)
|
void fpsimd_flush_thread(void)
|
||||||
{
|
{
|
||||||
|
preempt_disable();
|
||||||
memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state));
|
memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state));
|
||||||
fpsimd_load_state(¤t->thread.fpsimd_state);
|
fpsimd_load_state(¤t->thread.fpsimd_state);
|
||||||
|
preempt_enable();
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_KERNEL_MODE_NEON
|
#ifdef CONFIG_KERNEL_MODE_NEON
|
||||||
|
|
|
@ -35,7 +35,7 @@
|
||||||
*/
|
*/
|
||||||
ENTRY(__cpu_flush_user_tlb_range)
|
ENTRY(__cpu_flush_user_tlb_range)
|
||||||
vma_vm_mm x3, x2 // get vma->vm_mm
|
vma_vm_mm x3, x2 // get vma->vm_mm
|
||||||
mmid x3, x3 // get vm_mm->context.id
|
mmid w3, x3 // get vm_mm->context.id
|
||||||
dsb sy
|
dsb sy
|
||||||
lsr x0, x0, #12 // align address
|
lsr x0, x0, #12 // align address
|
||||||
lsr x1, x1, #12
|
lsr x1, x1, #12
|
||||||
|
|
|
@ -1,5 +1,19 @@
|
||||||
|
|
||||||
generic-y += clkdev.h
|
generic-y += clkdev.h
|
||||||
|
generic-y += cputime.h
|
||||||
|
generic-y += delay.h
|
||||||
|
generic-y += device.h
|
||||||
|
generic-y += div64.h
|
||||||
|
generic-y += emergency-restart.h
|
||||||
generic-y += exec.h
|
generic-y += exec.h
|
||||||
generic-y += trace_clock.h
|
generic-y += futex.h
|
||||||
|
generic-y += irq_regs.h
|
||||||
generic-y += param.h
|
generic-y += param.h
|
||||||
|
generic-y += local.h
|
||||||
|
generic-y += local64.h
|
||||||
|
generic-y += percpu.h
|
||||||
|
generic-y += scatterlist.h
|
||||||
|
generic-y += sections.h
|
||||||
|
generic-y += topology.h
|
||||||
|
generic-y += trace_clock.h
|
||||||
|
generic-y += xor.h
|
||||||
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef __ASM_AVR32_CPUTIME_H
|
|
||||||
#define __ASM_AVR32_CPUTIME_H
|
|
||||||
|
|
||||||
#include <asm-generic/cputime.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_CPUTIME_H */
|
|
|
@ -1 +0,0 @@
|
||||||
#include <asm-generic/delay.h>
|
|
|
@ -1,7 +0,0 @@
|
||||||
/*
|
|
||||||
* Arch specific extensions to struct device
|
|
||||||
*
|
|
||||||
* This file is released under the GPLv2
|
|
||||||
*/
|
|
||||||
#include <asm-generic/device.h>
|
|
||||||
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef __ASM_AVR32_DIV64_H
|
|
||||||
#define __ASM_AVR32_DIV64_H
|
|
||||||
|
|
||||||
#include <asm-generic/div64.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_DIV64_H */
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef __ASM_AVR32_EMERGENCY_RESTART_H
|
|
||||||
#define __ASM_AVR32_EMERGENCY_RESTART_H
|
|
||||||
|
|
||||||
#include <asm-generic/emergency-restart.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_EMERGENCY_RESTART_H */
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef __ASM_AVR32_FUTEX_H
|
|
||||||
#define __ASM_AVR32_FUTEX_H
|
|
||||||
|
|
||||||
#include <asm-generic/futex.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_FUTEX_H */
|
|
|
@ -1 +0,0 @@
|
||||||
#include <asm-generic/irq_regs.h>
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef __ASM_AVR32_LOCAL_H
|
|
||||||
#define __ASM_AVR32_LOCAL_H
|
|
||||||
|
|
||||||
#include <asm-generic/local.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_LOCAL_H */
|
|
|
@ -1 +0,0 @@
|
||||||
#include <asm-generic/local64.h>
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef __ASM_AVR32_PERCPU_H
|
|
||||||
#define __ASM_AVR32_PERCPU_H
|
|
||||||
|
|
||||||
#include <asm-generic/percpu.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_PERCPU_H */
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef __ASM_AVR32_SCATTERLIST_H
|
|
||||||
#define __ASM_AVR32_SCATTERLIST_H
|
|
||||||
|
|
||||||
#include <asm-generic/scatterlist.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_SCATTERLIST_H */
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef __ASM_AVR32_SECTIONS_H
|
|
||||||
#define __ASM_AVR32_SECTIONS_H
|
|
||||||
|
|
||||||
#include <asm-generic/sections.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_SECTIONS_H */
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef __ASM_AVR32_TOPOLOGY_H
|
|
||||||
#define __ASM_AVR32_TOPOLOGY_H
|
|
||||||
|
|
||||||
#include <asm-generic/topology.h>
|
|
||||||
|
|
||||||
#endif /* __ASM_AVR32_TOPOLOGY_H */
|
|
|
@ -1,6 +0,0 @@
|
||||||
#ifndef _ASM_XOR_H
|
|
||||||
#define _ASM_XOR_H
|
|
||||||
|
|
||||||
#include <asm-generic/xor.h>
|
|
||||||
|
|
||||||
#endif
|
|
|
@ -289,7 +289,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
|
||||||
memset(childregs, 0, sizeof(struct pt_regs));
|
memset(childregs, 0, sizeof(struct pt_regs));
|
||||||
p->thread.cpu_context.r0 = arg;
|
p->thread.cpu_context.r0 = arg;
|
||||||
p->thread.cpu_context.r1 = usp; /* fn */
|
p->thread.cpu_context.r1 = usp; /* fn */
|
||||||
p->thread.cpu_context.r2 = syscall_return;
|
p->thread.cpu_context.r2 = (unsigned long)syscall_return;
|
||||||
p->thread.cpu_context.pc = (unsigned long)ret_from_kernel_thread;
|
p->thread.cpu_context.pc = (unsigned long)ret_from_kernel_thread;
|
||||||
childregs->sr = MODE_SUPERVISOR;
|
childregs->sr = MODE_SUPERVISOR;
|
||||||
} else {
|
} else {
|
||||||
|
|
|
@ -98,7 +98,14 @@ static void comparator_mode(enum clock_event_mode mode,
|
||||||
case CLOCK_EVT_MODE_SHUTDOWN:
|
case CLOCK_EVT_MODE_SHUTDOWN:
|
||||||
sysreg_write(COMPARE, 0);
|
sysreg_write(COMPARE, 0);
|
||||||
pr_debug("%s: stop\n", evdev->name);
|
pr_debug("%s: stop\n", evdev->name);
|
||||||
cpu_idle_poll_ctrl(false);
|
if (evdev->mode == CLOCK_EVT_MODE_ONESHOT ||
|
||||||
|
evdev->mode == CLOCK_EVT_MODE_RESUME) {
|
||||||
|
/*
|
||||||
|
* Only disable idle poll if we have forced that
|
||||||
|
* in a previous call.
|
||||||
|
*/
|
||||||
|
cpu_idle_poll_ctrl(false);
|
||||||
|
}
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
BUG();
|
BUG();
|
||||||
|
|
|
@ -276,7 +276,7 @@ static struct platform_device mtx1_pci_host = {
|
||||||
.resource = alchemy_pci_host_res,
|
.resource = alchemy_pci_host_res,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct __initdata platform_device * mtx1_devs[] = {
|
static struct platform_device *mtx1_devs[] __initdata = {
|
||||||
&mtx1_pci_host,
|
&mtx1_pci_host,
|
||||||
&mtx1_gpio_leds,
|
&mtx1_gpio_leds,
|
||||||
&mtx1_wdt,
|
&mtx1_wdt,
|
||||||
|
|
|
@ -187,7 +187,7 @@
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other
|
* MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other
|
||||||
* pre-MIPS32/MIPS53 processors have CLO, CLZ. The IDT RC64574 is 64-bit and
|
* pre-MIPS32/MIPS64 processors have CLO, CLZ. The IDT RC64574 is 64-bit and
|
||||||
* has CLO and CLZ but not DCLO nor DCLZ. For 64-bit kernels
|
* has CLO and CLZ but not DCLO nor DCLZ. For 64-bit kernels
|
||||||
* cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
|
* cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -609,6 +609,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
|
||||||
r4k_blast_scache();
|
r4k_blast_scache();
|
||||||
else
|
else
|
||||||
blast_scache_range(addr, addr + size);
|
blast_scache_range(addr, addr + size);
|
||||||
|
preempt_enable();
|
||||||
__sync();
|
__sync();
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
@ -650,6 +651,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
|
||||||
*/
|
*/
|
||||||
blast_inv_scache_range(addr, addr + size);
|
blast_inv_scache_range(addr, addr + size);
|
||||||
}
|
}
|
||||||
|
preempt_enable();
|
||||||
__sync();
|
__sync();
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
|
@ -308,12 +308,10 @@ static void mips_dma_sync_sg_for_cpu(struct device *dev,
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
/* Make sure that gcc doesn't leave the empty loop body. */
|
if (cpu_needs_post_dma_flush(dev))
|
||||||
for (i = 0; i < nelems; i++, sg++) {
|
for (i = 0; i < nelems; i++, sg++)
|
||||||
if (cpu_needs_post_dma_flush(dev))
|
|
||||||
__dma_sync(sg_page(sg), sg->offset, sg->length,
|
__dma_sync(sg_page(sg), sg->offset, sg->length,
|
||||||
direction);
|
direction);
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void mips_dma_sync_sg_for_device(struct device *dev,
|
static void mips_dma_sync_sg_for_device(struct device *dev,
|
||||||
|
@ -321,12 +319,10 @@ static void mips_dma_sync_sg_for_device(struct device *dev,
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
/* Make sure that gcc doesn't leave the empty loop body. */
|
if (!plat_device_is_coherent(dev))
|
||||||
for (i = 0; i < nelems; i++, sg++) {
|
for (i = 0; i < nelems; i++, sg++)
|
||||||
if (!plat_device_is_coherent(dev))
|
|
||||||
__dma_sync(sg_page(sg), sg->offset, sg->length,
|
__dma_sync(sg_page(sg), sg->offset, sg->length,
|
||||||
direction);
|
direction);
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
||||||
|
|
|
@ -14,53 +14,9 @@
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
* (at your option) any later version.
|
* (at your option) any later version.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <linux/of.h> /* linux/of.h gets to determine #include ordering */
|
|
||||||
|
|
||||||
#ifndef _ASM_OPENRISC_PROM_H
|
#ifndef _ASM_OPENRISC_PROM_H
|
||||||
#define _ASM_OPENRISC_PROM_H
|
#define _ASM_OPENRISC_PROM_H
|
||||||
#ifdef __KERNEL__
|
|
||||||
#ifndef __ASSEMBLY__
|
|
||||||
|
|
||||||
#include <linux/types.h>
|
|
||||||
#include <asm/irq.h>
|
|
||||||
#include <linux/irqdomain.h>
|
|
||||||
#include <linux/atomic.h>
|
|
||||||
#include <linux/of_irq.h>
|
|
||||||
#include <linux/of_fdt.h>
|
|
||||||
#include <linux/of_address.h>
|
|
||||||
#include <linux/proc_fs.h>
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
#define HAVE_ARCH_DEVTREE_FIXUPS
|
#define HAVE_ARCH_DEVTREE_FIXUPS
|
||||||
|
|
||||||
/* Other Prototypes */
|
|
||||||
extern int early_uartlite_console(void);
|
|
||||||
|
|
||||||
/* Parse the ibm,dma-window property of an OF node into the busno, phys and
|
|
||||||
* size parameters.
|
|
||||||
*/
|
|
||||||
void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
|
|
||||||
unsigned long *busno, unsigned long *phys, unsigned long *size);
|
|
||||||
|
|
||||||
extern void kdump_move_device_tree(void);
|
|
||||||
|
|
||||||
/* Get the MAC address */
|
|
||||||
extern const void *of_get_mac_address(struct device_node *np);
|
|
||||||
|
|
||||||
/**
|
|
||||||
* of_irq_map_pci - Resolve the interrupt for a PCI device
|
|
||||||
* @pdev: the device whose interrupt is to be resolved
|
|
||||||
* @out_irq: structure of_irq filled by this function
|
|
||||||
*
|
|
||||||
* This function resolves the PCI interrupt for a given PCI device. If a
|
|
||||||
* device-node exists for a given pci_dev, it will use normal OF tree
|
|
||||||
* walking. If not, it will implement standard swizzling and walk up the
|
|
||||||
* PCI tree until an device-node is found, at which point it will finish
|
|
||||||
* resolving using the OF tree walking.
|
|
||||||
*/
|
|
||||||
struct pci_dev;
|
|
||||||
extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
|
|
||||||
|
|
||||||
#endif /* __ASSEMBLY__ */
|
|
||||||
#endif /* __KERNEL__ */
|
|
||||||
#endif /* _ASM_OPENRISC_PROM_H */
|
#endif /* _ASM_OPENRISC_PROM_H */
|
||||||
|
|
|
@ -182,6 +182,9 @@ void do_page_fault(struct pt_regs *regs, unsigned long code,
|
||||||
|
|
||||||
if (user_mode(regs))
|
if (user_mode(regs))
|
||||||
flags |= FAULT_FLAG_USER;
|
flags |= FAULT_FLAG_USER;
|
||||||
|
|
||||||
|
acc_type = parisc_acctyp(code, regs->iir);
|
||||||
|
|
||||||
if (acc_type & VM_WRITE)
|
if (acc_type & VM_WRITE)
|
||||||
flags |= FAULT_FLAG_WRITE;
|
flags |= FAULT_FLAG_WRITE;
|
||||||
retry:
|
retry:
|
||||||
|
@ -196,8 +199,6 @@ void do_page_fault(struct pt_regs *regs, unsigned long code,
|
||||||
|
|
||||||
good_area:
|
good_area:
|
||||||
|
|
||||||
acc_type = parisc_acctyp(code,regs->iir);
|
|
||||||
|
|
||||||
if ((vma->vm_flags & acc_type) != acc_type)
|
if ((vma->vm_flags & acc_type) != acc_type)
|
||||||
goto bad_area;
|
goto bad_area;
|
||||||
|
|
||||||
|
|
|
@ -74,7 +74,7 @@ src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c
|
||||||
src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c
|
src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c
|
||||||
src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c
|
src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c
|
||||||
|
|
||||||
src-plat-y := of.c
|
src-plat-y := of.c epapr.c
|
||||||
src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \
|
src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \
|
||||||
treeboot-walnut.c cuboot-acadia.c \
|
treeboot-walnut.c cuboot-acadia.c \
|
||||||
cuboot-kilauea.c simpleboot.c \
|
cuboot-kilauea.c simpleboot.c \
|
||||||
|
@ -97,7 +97,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
|
||||||
prpmc2800.c
|
prpmc2800.c
|
||||||
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
|
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
|
||||||
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
|
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
|
||||||
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c
|
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
|
||||||
|
|
||||||
src-wlib := $(sort $(src-wlib-y))
|
src-wlib := $(sort $(src-wlib-y))
|
||||||
src-plat := $(sort $(src-plat-y))
|
src-plat := $(sort $(src-plat-y))
|
||||||
|
|
9
arch/powerpc/boot/epapr-wrapper.c
Normal file
9
arch/powerpc/boot/epapr-wrapper.c
Normal file
|
@ -0,0 +1,9 @@
|
||||||
|
extern void epapr_platform_init(unsigned long r3, unsigned long r4,
|
||||||
|
unsigned long r5, unsigned long r6,
|
||||||
|
unsigned long r7);
|
||||||
|
|
||||||
|
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||||
|
unsigned long r6, unsigned long r7)
|
||||||
|
{
|
||||||
|
epapr_platform_init(r3, r4, r5, r6, r7);
|
||||||
|
}
|
|
@ -48,8 +48,8 @@ static void platform_fixups(void)
|
||||||
fdt_addr, fdt_totalsize((void *)fdt_addr), ima_size);
|
fdt_addr, fdt_totalsize((void *)fdt_addr), ima_size);
|
||||||
}
|
}
|
||||||
|
|
||||||
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
void epapr_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||||
unsigned long r6, unsigned long r7)
|
unsigned long r6, unsigned long r7)
|
||||||
{
|
{
|
||||||
epapr_magic = r6;
|
epapr_magic = r6;
|
||||||
ima_size = r7;
|
ima_size = r7;
|
||||||
|
|
|
@ -26,6 +26,9 @@
|
||||||
|
|
||||||
static unsigned long claim_base;
|
static unsigned long claim_base;
|
||||||
|
|
||||||
|
void epapr_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||||
|
unsigned long r6, unsigned long r7);
|
||||||
|
|
||||||
static void *of_try_claim(unsigned long size)
|
static void *of_try_claim(unsigned long size)
|
||||||
{
|
{
|
||||||
unsigned long addr = 0;
|
unsigned long addr = 0;
|
||||||
|
@ -61,7 +64,7 @@ static void of_image_hdr(const void *hdr)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void platform_init(unsigned long a1, unsigned long a2, void *promptr)
|
static void of_platform_init(unsigned long a1, unsigned long a2, void *promptr)
|
||||||
{
|
{
|
||||||
platform_ops.image_hdr = of_image_hdr;
|
platform_ops.image_hdr = of_image_hdr;
|
||||||
platform_ops.malloc = of_try_claim;
|
platform_ops.malloc = of_try_claim;
|
||||||
|
@ -81,3 +84,14 @@ void platform_init(unsigned long a1, unsigned long a2, void *promptr)
|
||||||
loader_info.initrd_size = a2;
|
loader_info.initrd_size = a2;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||||
|
unsigned long r6, unsigned long r7)
|
||||||
|
{
|
||||||
|
/* Detect OF vs. ePAPR boot */
|
||||||
|
if (r5)
|
||||||
|
of_platform_init(r3, r4, (void *)r5);
|
||||||
|
else
|
||||||
|
epapr_platform_init(r3, r4, r5, r6, r7);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
|
@ -148,18 +148,18 @@ make_space=y
|
||||||
|
|
||||||
case "$platform" in
|
case "$platform" in
|
||||||
pseries)
|
pseries)
|
||||||
platformo=$object/of.o
|
platformo="$object/of.o $object/epapr.o"
|
||||||
link_address='0x4000000'
|
link_address='0x4000000'
|
||||||
;;
|
;;
|
||||||
maple)
|
maple)
|
||||||
platformo=$object/of.o
|
platformo="$object/of.o $object/epapr.o"
|
||||||
link_address='0x400000'
|
link_address='0x400000'
|
||||||
;;
|
;;
|
||||||
pmac|chrp)
|
pmac|chrp)
|
||||||
platformo=$object/of.o
|
platformo="$object/of.o $object/epapr.o"
|
||||||
;;
|
;;
|
||||||
coff)
|
coff)
|
||||||
platformo="$object/crt0.o $object/of.o"
|
platformo="$object/crt0.o $object/of.o $object/epapr.o"
|
||||||
lds=$object/zImage.coff.lds
|
lds=$object/zImage.coff.lds
|
||||||
link_address='0x500000'
|
link_address='0x500000'
|
||||||
pie=
|
pie=
|
||||||
|
@ -253,6 +253,7 @@ treeboot-iss4xx-mpic)
|
||||||
platformo="$object/treeboot-iss4xx.o"
|
platformo="$object/treeboot-iss4xx.o"
|
||||||
;;
|
;;
|
||||||
epapr)
|
epapr)
|
||||||
|
platformo="$object/epapr.o $object/epapr-wrapper.o"
|
||||||
link_address='0x20000000'
|
link_address='0x20000000'
|
||||||
pie=-pie
|
pie=-pie
|
||||||
;;
|
;;
|
||||||
|
|
|
@ -69,9 +69,9 @@ extern struct thread_info *softirq_ctx[NR_CPUS];
|
||||||
|
|
||||||
extern void irq_ctx_init(void);
|
extern void irq_ctx_init(void);
|
||||||
extern void call_do_softirq(struct thread_info *tp);
|
extern void call_do_softirq(struct thread_info *tp);
|
||||||
extern int call_handle_irq(int irq, void *p1,
|
extern void call_do_irq(struct pt_regs *regs, struct thread_info *tp);
|
||||||
struct thread_info *tp, void *func);
|
|
||||||
extern void do_IRQ(struct pt_regs *regs);
|
extern void do_IRQ(struct pt_regs *regs);
|
||||||
|
extern void __do_irq(struct pt_regs *regs);
|
||||||
|
|
||||||
int irq_choose_cpu(const struct cpumask *mask);
|
int irq_choose_cpu(const struct cpumask *mask);
|
||||||
|
|
||||||
|
|
|
@ -149,8 +149,6 @@ typedef struct {
|
||||||
|
|
||||||
struct thread_struct {
|
struct thread_struct {
|
||||||
unsigned long ksp; /* Kernel stack pointer */
|
unsigned long ksp; /* Kernel stack pointer */
|
||||||
unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */
|
|
||||||
|
|
||||||
#ifdef CONFIG_PPC64
|
#ifdef CONFIG_PPC64
|
||||||
unsigned long ksp_vsid;
|
unsigned long ksp_vsid;
|
||||||
#endif
|
#endif
|
||||||
|
@ -162,6 +160,7 @@ struct thread_struct {
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_PPC32
|
#ifdef CONFIG_PPC32
|
||||||
void *pgdir; /* root of page-table tree */
|
void *pgdir; /* root of page-table tree */
|
||||||
|
unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */
|
||||||
#endif
|
#endif
|
||||||
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
||||||
/*
|
/*
|
||||||
|
@ -321,7 +320,6 @@ struct thread_struct {
|
||||||
#else
|
#else
|
||||||
#define INIT_THREAD { \
|
#define INIT_THREAD { \
|
||||||
.ksp = INIT_SP, \
|
.ksp = INIT_SP, \
|
||||||
.ksp_limit = INIT_SP_LIMIT, \
|
|
||||||
.regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
|
.regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
|
||||||
.fs = KERNEL_DS, \
|
.fs = KERNEL_DS, \
|
||||||
.fpr = {{0}}, \
|
.fpr = {{0}}, \
|
||||||
|
|
|
@ -80,10 +80,11 @@ int main(void)
|
||||||
DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
|
DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
|
||||||
#else
|
#else
|
||||||
DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
|
DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
|
||||||
|
DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16));
|
||||||
|
DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
|
||||||
#endif /* CONFIG_PPC64 */
|
#endif /* CONFIG_PPC64 */
|
||||||
|
|
||||||
DEFINE(KSP, offsetof(struct thread_struct, ksp));
|
DEFINE(KSP, offsetof(struct thread_struct, ksp));
|
||||||
DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
|
|
||||||
DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
|
DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
|
||||||
#ifdef CONFIG_BOOKE
|
#ifdef CONFIG_BOOKE
|
||||||
DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
|
DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
|
||||||
|
|
|
@ -661,7 +661,7 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)
|
||||||
/* number of bytes needed for the bitmap */
|
/* number of bytes needed for the bitmap */
|
||||||
sz = BITS_TO_LONGS(tbl->it_size) * sizeof(unsigned long);
|
sz = BITS_TO_LONGS(tbl->it_size) * sizeof(unsigned long);
|
||||||
|
|
||||||
page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz));
|
page = alloc_pages_node(nid, GFP_KERNEL, get_order(sz));
|
||||||
if (!page)
|
if (!page)
|
||||||
panic("iommu_init_table: Can't allocate %ld bytes\n", sz);
|
panic("iommu_init_table: Can't allocate %ld bytes\n", sz);
|
||||||
tbl->it_map = page_address(page);
|
tbl->it_map = page_address(page);
|
||||||
|
|
|
@ -441,50 +441,6 @@ void migrate_irqs(void)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static inline void handle_one_irq(unsigned int irq)
|
|
||||||
{
|
|
||||||
struct thread_info *curtp, *irqtp;
|
|
||||||
unsigned long saved_sp_limit;
|
|
||||||
struct irq_desc *desc;
|
|
||||||
|
|
||||||
desc = irq_to_desc(irq);
|
|
||||||
if (!desc)
|
|
||||||
return;
|
|
||||||
|
|
||||||
/* Switch to the irq stack to handle this */
|
|
||||||
curtp = current_thread_info();
|
|
||||||
irqtp = hardirq_ctx[smp_processor_id()];
|
|
||||||
|
|
||||||
if (curtp == irqtp) {
|
|
||||||
/* We're already on the irq stack, just handle it */
|
|
||||||
desc->handle_irq(irq, desc);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
saved_sp_limit = current->thread.ksp_limit;
|
|
||||||
|
|
||||||
irqtp->task = curtp->task;
|
|
||||||
irqtp->flags = 0;
|
|
||||||
|
|
||||||
/* Copy the softirq bits in preempt_count so that the
|
|
||||||
* softirq checks work in the hardirq context. */
|
|
||||||
irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) |
|
|
||||||
(curtp->preempt_count & SOFTIRQ_MASK);
|
|
||||||
|
|
||||||
current->thread.ksp_limit = (unsigned long)irqtp +
|
|
||||||
_ALIGN_UP(sizeof(struct thread_info), 16);
|
|
||||||
|
|
||||||
call_handle_irq(irq, desc, irqtp, desc->handle_irq);
|
|
||||||
current->thread.ksp_limit = saved_sp_limit;
|
|
||||||
irqtp->task = NULL;
|
|
||||||
|
|
||||||
/* Set any flag that may have been set on the
|
|
||||||
* alternate stack
|
|
||||||
*/
|
|
||||||
if (irqtp->flags)
|
|
||||||
set_bits(irqtp->flags, &curtp->flags);
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void check_stack_overflow(void)
|
static inline void check_stack_overflow(void)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_DEBUG_STACKOVERFLOW
|
#ifdef CONFIG_DEBUG_STACKOVERFLOW
|
||||||
|
@ -501,9 +457,9 @@ static inline void check_stack_overflow(void)
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
void do_IRQ(struct pt_regs *regs)
|
void __do_irq(struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
struct pt_regs *old_regs = set_irq_regs(regs);
|
struct irq_desc *desc;
|
||||||
unsigned int irq;
|
unsigned int irq;
|
||||||
|
|
||||||
irq_enter();
|
irq_enter();
|
||||||
|
@ -519,18 +475,56 @@ void do_IRQ(struct pt_regs *regs)
|
||||||
*/
|
*/
|
||||||
irq = ppc_md.get_irq();
|
irq = ppc_md.get_irq();
|
||||||
|
|
||||||
/* We can hard enable interrupts now */
|
/* We can hard enable interrupts now to allow perf interrupts */
|
||||||
may_hard_irq_enable();
|
may_hard_irq_enable();
|
||||||
|
|
||||||
/* And finally process it */
|
/* And finally process it */
|
||||||
if (irq != NO_IRQ)
|
if (unlikely(irq == NO_IRQ))
|
||||||
handle_one_irq(irq);
|
|
||||||
else
|
|
||||||
__get_cpu_var(irq_stat).spurious_irqs++;
|
__get_cpu_var(irq_stat).spurious_irqs++;
|
||||||
|
else {
|
||||||
|
desc = irq_to_desc(irq);
|
||||||
|
if (likely(desc))
|
||||||
|
desc->handle_irq(irq, desc);
|
||||||
|
}
|
||||||
|
|
||||||
trace_irq_exit(regs);
|
trace_irq_exit(regs);
|
||||||
|
|
||||||
irq_exit();
|
irq_exit();
|
||||||
|
}
|
||||||
|
|
||||||
|
void do_IRQ(struct pt_regs *regs)
|
||||||
|
{
|
||||||
|
struct pt_regs *old_regs = set_irq_regs(regs);
|
||||||
|
struct thread_info *curtp, *irqtp;
|
||||||
|
|
||||||
|
/* Switch to the irq stack to handle this */
|
||||||
|
curtp = current_thread_info();
|
||||||
|
irqtp = hardirq_ctx[raw_smp_processor_id()];
|
||||||
|
|
||||||
|
/* Already there ? */
|
||||||
|
if (unlikely(curtp == irqtp)) {
|
||||||
|
__do_irq(regs);
|
||||||
|
set_irq_regs(old_regs);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Prepare the thread_info in the irq stack */
|
||||||
|
irqtp->task = curtp->task;
|
||||||
|
irqtp->flags = 0;
|
||||||
|
|
||||||
|
/* Copy the preempt_count so that the [soft]irq checks work. */
|
||||||
|
irqtp->preempt_count = curtp->preempt_count;
|
||||||
|
|
||||||
|
/* Switch stack and call */
|
||||||
|
call_do_irq(regs, irqtp);
|
||||||
|
|
||||||
|
/* Restore stack limit */
|
||||||
|
irqtp->task = NULL;
|
||||||
|
|
||||||
|
/* Copy back updates to the thread_info */
|
||||||
|
if (irqtp->flags)
|
||||||
|
set_bits(irqtp->flags, &curtp->flags);
|
||||||
|
|
||||||
set_irq_regs(old_regs);
|
set_irq_regs(old_regs);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -592,28 +586,22 @@ void irq_ctx_init(void)
|
||||||
memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
|
memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
|
||||||
tp = softirq_ctx[i];
|
tp = softirq_ctx[i];
|
||||||
tp->cpu = i;
|
tp->cpu = i;
|
||||||
tp->preempt_count = 0;
|
|
||||||
|
|
||||||
memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
|
memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
|
||||||
tp = hardirq_ctx[i];
|
tp = hardirq_ctx[i];
|
||||||
tp->cpu = i;
|
tp->cpu = i;
|
||||||
tp->preempt_count = HARDIRQ_OFFSET;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void do_softirq_onstack(void)
|
static inline void do_softirq_onstack(void)
|
||||||
{
|
{
|
||||||
struct thread_info *curtp, *irqtp;
|
struct thread_info *curtp, *irqtp;
|
||||||
unsigned long saved_sp_limit = current->thread.ksp_limit;
|
|
||||||
|
|
||||||
curtp = current_thread_info();
|
curtp = current_thread_info();
|
||||||
irqtp = softirq_ctx[smp_processor_id()];
|
irqtp = softirq_ctx[smp_processor_id()];
|
||||||
irqtp->task = curtp->task;
|
irqtp->task = curtp->task;
|
||||||
irqtp->flags = 0;
|
irqtp->flags = 0;
|
||||||
current->thread.ksp_limit = (unsigned long)irqtp +
|
|
||||||
_ALIGN_UP(sizeof(struct thread_info), 16);
|
|
||||||
call_do_softirq(irqtp);
|
call_do_softirq(irqtp);
|
||||||
current->thread.ksp_limit = saved_sp_limit;
|
|
||||||
irqtp->task = NULL;
|
irqtp->task = NULL;
|
||||||
|
|
||||||
/* Set any flag that may have been set on the
|
/* Set any flag that may have been set on the
|
||||||
|
|
|
@ -36,26 +36,41 @@
|
||||||
|
|
||||||
.text
|
.text
|
||||||
|
|
||||||
|
/*
|
||||||
|
* We store the saved ksp_limit in the unused part
|
||||||
|
* of the STACK_FRAME_OVERHEAD
|
||||||
|
*/
|
||||||
_GLOBAL(call_do_softirq)
|
_GLOBAL(call_do_softirq)
|
||||||
mflr r0
|
mflr r0
|
||||||
stw r0,4(r1)
|
stw r0,4(r1)
|
||||||
|
lwz r10,THREAD+KSP_LIMIT(r2)
|
||||||
|
addi r11,r3,THREAD_INFO_GAP
|
||||||
stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
|
stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
|
||||||
mr r1,r3
|
mr r1,r3
|
||||||
|
stw r10,8(r1)
|
||||||
|
stw r11,THREAD+KSP_LIMIT(r2)
|
||||||
bl __do_softirq
|
bl __do_softirq
|
||||||
|
lwz r10,8(r1)
|
||||||
lwz r1,0(r1)
|
lwz r1,0(r1)
|
||||||
lwz r0,4(r1)
|
lwz r0,4(r1)
|
||||||
|
stw r10,THREAD+KSP_LIMIT(r2)
|
||||||
mtlr r0
|
mtlr r0
|
||||||
blr
|
blr
|
||||||
|
|
||||||
_GLOBAL(call_handle_irq)
|
_GLOBAL(call_do_irq)
|
||||||
mflr r0
|
mflr r0
|
||||||
stw r0,4(r1)
|
stw r0,4(r1)
|
||||||
mtctr r6
|
lwz r10,THREAD+KSP_LIMIT(r2)
|
||||||
stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r5)
|
addi r11,r3,THREAD_INFO_GAP
|
||||||
mr r1,r5
|
stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
|
||||||
bctrl
|
mr r1,r4
|
||||||
|
stw r10,8(r1)
|
||||||
|
stw r11,THREAD+KSP_LIMIT(r2)
|
||||||
|
bl __do_irq
|
||||||
|
lwz r10,8(r1)
|
||||||
lwz r1,0(r1)
|
lwz r1,0(r1)
|
||||||
lwz r0,4(r1)
|
lwz r0,4(r1)
|
||||||
|
stw r10,THREAD+KSP_LIMIT(r2)
|
||||||
mtlr r0
|
mtlr r0
|
||||||
blr
|
blr
|
||||||
|
|
||||||
|
|
|
@ -40,14 +40,12 @@ _GLOBAL(call_do_softirq)
|
||||||
mtlr r0
|
mtlr r0
|
||||||
blr
|
blr
|
||||||
|
|
||||||
_GLOBAL(call_handle_irq)
|
_GLOBAL(call_do_irq)
|
||||||
ld r8,0(r6)
|
|
||||||
mflr r0
|
mflr r0
|
||||||
std r0,16(r1)
|
std r0,16(r1)
|
||||||
mtctr r8
|
stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
|
||||||
stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r5)
|
mr r1,r4
|
||||||
mr r1,r5
|
bl .__do_irq
|
||||||
bctrl
|
|
||||||
ld r1,0(r1)
|
ld r1,0(r1)
|
||||||
ld r0,16(r1)
|
ld r0,16(r1)
|
||||||
mtlr r0
|
mtlr r0
|
||||||
|
|
|
@ -1000,9 +1000,10 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
|
||||||
kregs = (struct pt_regs *) sp;
|
kregs = (struct pt_regs *) sp;
|
||||||
sp -= STACK_FRAME_OVERHEAD;
|
sp -= STACK_FRAME_OVERHEAD;
|
||||||
p->thread.ksp = sp;
|
p->thread.ksp = sp;
|
||||||
|
#ifdef CONFIG_PPC32
|
||||||
p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
|
p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
|
||||||
_ALIGN_UP(sizeof(struct thread_info), 16);
|
_ALIGN_UP(sizeof(struct thread_info), 16);
|
||||||
|
#endif
|
||||||
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
||||||
p->thread.ptrace_bps[0] = NULL;
|
p->thread.ptrace_bps[0] = NULL;
|
||||||
#endif
|
#endif
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue