Third Round of Renesas ARM64 Based SoC DT Updates for v4.5

* Enable SATA
 * Add salvator-x part number to DT bindings documentation
 * Enable all four A57 cores instead of just one
 * Enhanced audio support:
   - Use CS2000 as AUDIO_CLK_B
   - Set ak4613 In/Out pin as single-end
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Merge tag 'renesas-arm64-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64

Third Round of Renesas ARM64 Based SoC DT Updates for v4.5

* Enable SATA
* Add salvator-x part number to DT bindings documentation
* Enable all four A57 cores instead of just one
* Enhanced audio support:
  - Use CS2000 as AUDIO_CLK_B
  - Set ak4613 In/Out pin as single-end

* tag 'renesas-arm64-dt3-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: renesas: r8a7795: fix SATA clock assignment
  arm64: dts: salvator-x: Enable SATA controller
  arm64: dts: r8a7795: Add SATA controller node
  arm64: renesas: r8a7795: add internal delay for i2c IPs
  arm64: renesas: salvator-x: Add board part number to DT bindings
  arm64: dts: r8a7795: Add pmu device nodes
  arm64: dts: r8a7795: Add Cortex-A57 CPU cores
  arm64: dts: r8a7795: Add PSCI node
  arm64: renesas: salvator-x: use CS2000 as AUDIO_CLK_B
  arm64: renesas: salvator-x: set ak4613 In/Out pin as single-end

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-12-22 12:51:21 -08:00
commit 43ff5eaf09
3 changed files with 110 additions and 7 deletions

View file

@ -59,7 +59,7 @@ Boards:
compatible = "renesas,marzen", "renesas,r8a7779"
- Porter (M2-LCDP)
compatible = "renesas,porter", "renesas,r8a7791"
- Salvator-X
- Salvator-X (RTP0RC7795SIPB0010S)
compatible = "renesas,salvator-x", "renesas,r8a7795";
- SILK (RTP0RC7794LCB00011S)
compatible = "renesas,silk", "renesas,r8a7794"

View file

@ -61,6 +61,16 @@ x12_clk: x12_clk {
clock-frequency = <24576000>;
};
audio_clkout: audio_clkout {
/*
* This is same as <&rcar_sound 0>
* but needed to avoid cs2000/rcar_sound probe dead-lock
*/
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
};
rsnd_ak4613: sound {
compatible = "simple-audio-card";
@ -141,6 +151,26 @@ ak4613: codec@10 {
#sound-dai-cells = <0>;
reg = <0x10>;
clocks = <&rcar_sound 3>;
asahi-kasei,in1-single-end;
asahi-kasei,in2-single-end;
asahi-kasei,out1-single-end;
asahi-kasei,out2-single-end;
asahi-kasei,out3-single-end;
asahi-kasei,out4-single-end;
asahi-kasei,out5-single-end;
asahi-kasei,out6-single-end;
};
cs2000: clk_multiplier@4f {
#clock-cells = <0>;
compatible = "cirrus,cs2000-cp";
reg = <0x4f>;
clocks = <&audio_clkout>, <&x12_clk>;
clock-names = "clk_in", "ref_clk";
assigned-clocks = <&cs2000>;
assigned-clock-rates = <24576000>; /* 1/1 divide */
};
};
@ -157,6 +187,23 @@ &rcar_sound {
status = "okay";
/* update <audio_clk_b> to <cs2000> */
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&cs2000>,
<&audio_clk_c>,
<&cpg CPG_CORE R8A7795_CLK_S0D4>;
rcar_sound,dai {
dai0 {
playback = <&ssi0 &src0 &dvc0>;
@ -165,6 +212,10 @@ dai0 {
};
};
&sata {
status = "okay";
};
&ssi1 {
shared-pin;
};

View file

@ -26,15 +26,39 @@ aliases {
i2c6 = &i2c6;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
/* 1 core only at this point */
a57_0: cpu@0 {
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x0>;
device_type = "cpu";
enable-method = "psci";
};
a57_1: cpu@1 {
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x1>;
device_type = "cpu";
enable-method = "psci";
};
a57_2: cpu@2 {
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x2>;
device_type = "cpu";
enable-method = "psci";
};
a57_3: cpu@3 {
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x3>;
device_type = "cpu";
enable-method = "psci";
};
};
@ -78,6 +102,7 @@ audio_clk_c: audio_clk_c {
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@ -90,7 +115,7 @@ gic: interrupt-controller@0xf1010000 {
reg = <0x0 0xf1010000 0 0x1000>,
<0x0 0xf1020000 0 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
gpio0: gpio@e6050000 {
@ -205,16 +230,28 @@ gpio7: gpio@e6055800 {
power-domains = <&cpg>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a57_0>,
<&a57_1>,
<&a57_2>,
<&a57_3>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
cpg: clock-controller@e6150000 {
@ -489,6 +526,7 @@ i2c0: i2c@e6500000 {
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&cpg>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@ -500,6 +538,7 @@ i2c1: i2c@e6508000 {
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&cpg>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@ -511,6 +550,7 @@ i2c2: i2c@e6510000 {
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&cpg>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@ -522,6 +562,7 @@ i2c3: i2c@e66d0000 {
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&cpg>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@ -533,6 +574,7 @@ i2c4: i2c@e66d8000 {
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&cpg>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@ -544,6 +586,7 @@ i2c5: i2c@e66e0000 {
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 919>;
power-domains = <&cpg>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
@ -555,6 +598,7 @@ i2c6: i2c@e66e8000 {
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 918>;
power-domains = <&cpg>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
@ -723,5 +767,13 @@ ssi9: ssi@9 {
};
};
};
sata: sata@ee300000 {
compatible = "renesas,sata-r8a7795";
reg = <0 0xee300000 0 0x1fff>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 815>;
status = "disabled";
};
};
};