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synced 2024-08-23 01:10:04 +00:00
ir-rx51: Fix build after multiarch changes broke it
The ir-rx51 driver for n900 has been disabled since the multiarch changes as plat include directory no longer is SoC specific. Let's fix it with minimal changes to pass the dmtimer calls in pdata. Then the following changes can be done while things can be tested to be working for each change: 1. Change the non-pwm dmtimer to use just hrtimer if possible 2. Change the pwm dmtimer to use Linux PWM API with the new drivers/pwm/pwm-omap-dmtimer.c and remove the direct calls to dmtimer functions 3. Parse configuration from device tree and drop the pdata Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: linux-media@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Acked-by: Pavel Machek <pavel@ucw.cz> Acked-by: Pali Rohár <pali.rohar@gmail.com>
This commit is contained in:
parent
1a695a905c
commit
4406d52a0b
2 changed files with 54 additions and 47 deletions
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@ -336,7 +336,7 @@ config IR_TTUSBIR
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config IR_RX51
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tristate "Nokia N900 IR transmitter diode"
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depends on OMAP_DM_TIMER && ARCH_OMAP2PLUS && LIRC && !ARCH_MULTIPLATFORM
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depends on OMAP_DM_TIMER && PWM_OMAP_DMTIMER && ARCH_OMAP2PLUS && LIRC
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---help---
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Say Y or M here if you want to enable support for the IR
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transmitter diode built in the Nokia N900 (RX51) device.
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@ -19,6 +19,7 @@
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*
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*/
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/uaccess.h>
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@ -26,11 +27,9 @@
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#include <linux/sched.h>
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#include <linux/wait.h>
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#include <plat/dmtimer.h>
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#include <plat/clock.h>
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#include <media/lirc.h>
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#include <media/lirc_dev.h>
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#include <linux/platform_data/pwm_omap_dmtimer.h>
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#include <linux/platform_data/media/ir-rx51.h>
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#define LIRC_RX51_DRIVER_FEATURES (LIRC_CAN_SET_SEND_DUTY_CYCLE | \
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@ -44,8 +43,9 @@
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#define TIMER_MAX_VALUE 0xffffffff
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struct lirc_rx51 {
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struct omap_dm_timer *pwm_timer;
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struct omap_dm_timer *pulse_timer;
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pwm_omap_dmtimer *pwm_timer;
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pwm_omap_dmtimer *pulse_timer;
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struct pwm_omap_dmtimer_pdata *dmtimer;
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struct device *dev;
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struct lirc_rx51_platform_data *pdata;
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wait_queue_head_t wqueue;
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@ -63,14 +63,14 @@ struct lirc_rx51 {
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static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
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{
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omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
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OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
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lirc_rx51->dmtimer->set_pwm(lirc_rx51->pwm_timer, 0, 1,
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PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE);
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}
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static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
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{
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omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
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OMAP_TIMER_TRIGGER_NONE);
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lirc_rx51->dmtimer->set_pwm(lirc_rx51->pwm_timer, 0, 1,
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PWM_OMAP_DMTIMER_TRIGGER_NONE);
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}
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static int init_timing_params(struct lirc_rx51 *lirc_rx51)
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@ -79,12 +79,12 @@ static int init_timing_params(struct lirc_rx51 *lirc_rx51)
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load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq);
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match = -(lirc_rx51->duty_cycle * -load / 100);
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omap_dm_timer_set_load(lirc_rx51->pwm_timer, 1, load);
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omap_dm_timer_set_match(lirc_rx51->pwm_timer, 1, match);
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omap_dm_timer_write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2);
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omap_dm_timer_start(lirc_rx51->pwm_timer);
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omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
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omap_dm_timer_start(lirc_rx51->pulse_timer);
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lirc_rx51->dmtimer->set_load(lirc_rx51->pwm_timer, 1, load);
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lirc_rx51->dmtimer->set_match(lirc_rx51->pwm_timer, 1, match);
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lirc_rx51->dmtimer->write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2);
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lirc_rx51->dmtimer->start(lirc_rx51->pwm_timer);
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lirc_rx51->dmtimer->set_int_enable(lirc_rx51->pulse_timer, 0);
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lirc_rx51->dmtimer->start(lirc_rx51->pulse_timer);
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lirc_rx51->match = 0;
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@ -100,15 +100,15 @@ static int pulse_timer_set_timeout(struct lirc_rx51 *lirc_rx51, int usec)
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BUG_ON(usec < 0);
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if (lirc_rx51->match == 0)
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counter = omap_dm_timer_read_counter(lirc_rx51->pulse_timer);
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counter = lirc_rx51->dmtimer->read_counter(lirc_rx51->pulse_timer);
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else
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counter = lirc_rx51->match;
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counter += (u32)(lirc_rx51->fclk_khz * usec / (1000));
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omap_dm_timer_set_match(lirc_rx51->pulse_timer, 1, counter);
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omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer,
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OMAP_TIMER_INT_MATCH);
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if (tics_after(omap_dm_timer_read_counter(lirc_rx51->pulse_timer),
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lirc_rx51->dmtimer->set_match(lirc_rx51->pulse_timer, 1, counter);
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lirc_rx51->dmtimer->set_int_enable(lirc_rx51->pulse_timer,
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PWM_OMAP_DMTIMER_INT_MATCH);
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if (tics_after(lirc_rx51->dmtimer->read_counter(lirc_rx51->pulse_timer),
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counter)) {
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return 1;
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}
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@ -120,18 +120,18 @@ static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr)
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unsigned int retval;
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struct lirc_rx51 *lirc_rx51 = ptr;
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retval = omap_dm_timer_read_status(lirc_rx51->pulse_timer);
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retval = lirc_rx51->dmtimer->read_status(lirc_rx51->pulse_timer);
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if (!retval)
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return IRQ_NONE;
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if (retval & ~OMAP_TIMER_INT_MATCH)
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if (retval & ~PWM_OMAP_DMTIMER_INT_MATCH)
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dev_err_ratelimited(lirc_rx51->dev,
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": Unexpected interrupt source: %x\n", retval);
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omap_dm_timer_write_status(lirc_rx51->pulse_timer,
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OMAP_TIMER_INT_MATCH |
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OMAP_TIMER_INT_OVERFLOW |
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OMAP_TIMER_INT_CAPTURE);
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lirc_rx51->dmtimer->write_status(lirc_rx51->pulse_timer,
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PWM_OMAP_DMTIMER_INT_MATCH |
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PWM_OMAP_DMTIMER_INT_OVERFLOW |
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PWM_OMAP_DMTIMER_INT_CAPTURE);
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if (lirc_rx51->wbuf_index < 0) {
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dev_err_ratelimited(lirc_rx51->dev,
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": BUG wbuf_index has value of %i\n",
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@ -165,9 +165,9 @@ static irqreturn_t lirc_rx51_interrupt_handler(int irq, void *ptr)
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/* Stop TX here */
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lirc_rx51_off(lirc_rx51);
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lirc_rx51->wbuf_index = -1;
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omap_dm_timer_stop(lirc_rx51->pwm_timer);
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omap_dm_timer_stop(lirc_rx51->pulse_timer);
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omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
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lirc_rx51->dmtimer->stop(lirc_rx51->pwm_timer);
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lirc_rx51->dmtimer->stop(lirc_rx51->pulse_timer);
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lirc_rx51->dmtimer->set_int_enable(lirc_rx51->pulse_timer, 0);
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wake_up_interruptible(&lirc_rx51->wqueue);
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return IRQ_HANDLED;
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@ -178,28 +178,29 @@ static int lirc_rx51_init_port(struct lirc_rx51 *lirc_rx51)
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struct clk *clk_fclk;
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int retval, pwm_timer = lirc_rx51->pwm_timer_num;
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lirc_rx51->pwm_timer = omap_dm_timer_request_specific(pwm_timer);
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lirc_rx51->pwm_timer = lirc_rx51->dmtimer->request_specific(pwm_timer);
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if (lirc_rx51->pwm_timer == NULL) {
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dev_err(lirc_rx51->dev, ": Error requesting GPT%d timer\n",
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pwm_timer);
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return -EBUSY;
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}
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lirc_rx51->pulse_timer = omap_dm_timer_request();
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lirc_rx51->pulse_timer = lirc_rx51->dmtimer->request();
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if (lirc_rx51->pulse_timer == NULL) {
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dev_err(lirc_rx51->dev, ": Error requesting pulse timer\n");
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retval = -EBUSY;
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goto err1;
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}
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omap_dm_timer_set_source(lirc_rx51->pwm_timer, OMAP_TIMER_SRC_SYS_CLK);
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omap_dm_timer_set_source(lirc_rx51->pulse_timer,
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OMAP_TIMER_SRC_SYS_CLK);
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lirc_rx51->dmtimer->set_source(lirc_rx51->pwm_timer,
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PWM_OMAP_DMTIMER_SRC_SYS_CLK);
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lirc_rx51->dmtimer->set_source(lirc_rx51->pulse_timer,
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PWM_OMAP_DMTIMER_SRC_SYS_CLK);
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omap_dm_timer_enable(lirc_rx51->pwm_timer);
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omap_dm_timer_enable(lirc_rx51->pulse_timer);
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lirc_rx51->dmtimer->enable(lirc_rx51->pwm_timer);
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lirc_rx51->dmtimer->enable(lirc_rx51->pulse_timer);
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lirc_rx51->irq_num = omap_dm_timer_get_irq(lirc_rx51->pulse_timer);
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lirc_rx51->irq_num = lirc_rx51->dmtimer->get_irq(lirc_rx51->pulse_timer);
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retval = request_irq(lirc_rx51->irq_num, lirc_rx51_interrupt_handler,
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IRQF_SHARED, "lirc_pulse_timer", lirc_rx51);
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if (retval) {
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goto err2;
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}
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clk_fclk = omap_dm_timer_get_fclk(lirc_rx51->pwm_timer);
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lirc_rx51->fclk_khz = clk_fclk->rate / 1000;
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clk_fclk = lirc_rx51->dmtimer->get_fclk(lirc_rx51->pwm_timer);
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lirc_rx51->fclk_khz = clk_get_rate(clk_fclk) / 1000;
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return 0;
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err2:
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omap_dm_timer_free(lirc_rx51->pulse_timer);
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lirc_rx51->dmtimer->free(lirc_rx51->pulse_timer);
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err1:
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omap_dm_timer_free(lirc_rx51->pwm_timer);
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lirc_rx51->dmtimer->free(lirc_rx51->pwm_timer);
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return retval;
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}
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static int lirc_rx51_free_port(struct lirc_rx51 *lirc_rx51)
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{
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omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
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lirc_rx51->dmtimer->set_int_enable(lirc_rx51->pulse_timer, 0);
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free_irq(lirc_rx51->irq_num, lirc_rx51);
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lirc_rx51_off(lirc_rx51);
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omap_dm_timer_disable(lirc_rx51->pwm_timer);
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omap_dm_timer_disable(lirc_rx51->pulse_timer);
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omap_dm_timer_free(lirc_rx51->pwm_timer);
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omap_dm_timer_free(lirc_rx51->pulse_timer);
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lirc_rx51->dmtimer->disable(lirc_rx51->pwm_timer);
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lirc_rx51->dmtimer->disable(lirc_rx51->pulse_timer);
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lirc_rx51->dmtimer->free(lirc_rx51->pwm_timer);
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lirc_rx51->dmtimer->free(lirc_rx51->pulse_timer);
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lirc_rx51->wbuf_index = -1;
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return 0;
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{
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lirc_rx51_driver.features = LIRC_RX51_DRIVER_FEATURES;
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lirc_rx51.pdata = dev->dev.platform_data;
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if (!lirc_rx51.pdata->dmtimer) {
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dev_err(&dev->dev, "no dmtimer?\n");
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return -ENODEV;
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}
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lirc_rx51.pwm_timer_num = lirc_rx51.pdata->pwm_timer;
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lirc_rx51.dmtimer = lirc_rx51.pdata->dmtimer;
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lirc_rx51.dev = &dev->dev;
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lirc_rx51_driver.dev = &dev->dev;
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lirc_rx51_driver.minor = lirc_register_driver(&lirc_rx51_driver);
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