mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-09-15 15:15:47 +00:00
Code Issues Releases Wiki Activity

mips: ar7: convert to clkdev_lookup

Browse source 
ar7 is one of only two platforms that provide the clock interface but
implement a custom version of the clkdev_lookup code.

Change this to use the generic version instead.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-05-29 17:04:37 +02:00
parent 6efb943b86
commit 4410c4236e
2 changed files with 12 additions and 20 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
arch/mips/Kconfig
View file

@ -215,6 +215,7 @@ config AR7
select SYS_SUPPORTS_ZBOOT_UART16550
select GPIOLIB
select VLYNQ
select CLKDEV_LOOKUP
select HAVE_LEGACY_CLK
help
Support for the Texas Instruments AR7 System-on-a-Chip

31
arch/mips/ar7/clock.c
View file

@ -13,6 +13,7 @@
#include <linux/gcd.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/clkdev.h>
#include <linux/clk.h>
#include <asm/addrspace.h>
@ -424,27 +425,15 @@ unsigned long clk_get_rate(struct clk *clk)
}
EXPORT_SYMBOL(clk_get_rate);
struct clk *clk_get(struct device *dev, const char *id)
{
if (!strcmp(id, "bus"))
return &bus_clk;
static struct clk_lookup ar7_clkdev_table[] = {
CLKDEV_INIT(NULL, "bus", &bus_clk),
/* cpmac and vbus share the same rate */
if (!strcmp(id, "cpmac"))
return &vbus_clk;
if (!strcmp(id, "cpu"))
return &cpu_clk;
if (!strcmp(id, "dsp"))
return &dsp_clk;
if (!strcmp(id, "vbus"))
return &vbus_clk;
return ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(clk_get);
void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);
CLKDEV_INIT("cpmac.0", "cpmac", &vbus_clk),
CLKDEV_INIT("cpmac.1", "cpmac", &vbus_clk),
CLKDEV_INIT(NULL, "cpu", &cpu_clk),
CLKDEV_INIT(NULL, "dsp", &dsp_clk),
CLKDEV_INIT(NULL, "vbus", &vbus_clk),
};
void __init ar7_init_clocks(void)
{
@ -462,6 +451,8 @@ void __init ar7_init_clocks(void)
}
/* adjust vbus clock rate */
vbus_clk.rate = bus_clk.rate / 2;
clkdev_add_table(ar7_clkdev_table, ARRAY_SIZE(ar7_clkdev_table));
}
/* dummy functions, should not be called */