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ARM: proc-v7: clean up MIDR access
We already have the main ID register available in r9, there's no need to refetch it. Use the saved value. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1 changed files with 4 additions and 5 deletions
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@ -409,14 +409,13 @@ __v7_setup:
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bl v7_flush_dcache_louis
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bl v7_flush_dcache_louis
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ldmia r12, {r0-r5, r7, r9, r11, lr}
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ldmia r12, {r0-r5, r7, r9, r11, lr}
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mrc p15, 0, r0, c0, c0, 0 @ read main ID register
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and r10, r9, #0xff000000 @ ARM?
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and r10, r0, #0xff000000 @ ARM?
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teq r10, #0x41000000
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teq r10, #0x41000000
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bne __errata_finish
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bne __errata_finish
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and r3, r0, #0x00f00000 @ variant
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and r3, r9, #0x00f00000 @ variant
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and r6, r0, #0x0000000f @ revision
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and r6, r9, #0x0000000f @ revision
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orr r6, r6, r3, lsr #20-4 @ combine variant and revision
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orr r6, r6, r3, lsr #20-4 @ combine variant and revision
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ubfx r0, r0, #4, #12 @ primary part number
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ubfx r0, r9, #4, #12 @ primary part number
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/* Cortex-A8 Errata */
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/* Cortex-A8 Errata */
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ldr r10, =0x00000c08 @ Cortex-A8 primary part number
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ldr r10, =0x00000c08 @ Cortex-A8 primary part number
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