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pinctrl: sunxi: h616: add extra gpio banks
Some SoCs from the H616 family (such as the T507) have the same die but more output pins that are used for additional peripherals. The T507 SoC don't have a built-in multiphy like the AC200 or AC300 connected to the bank A. With the T507 these pins can be freely used for any other application. This patch adds the missing muxes on banks A, D and E. Thanks to Samuel and Andre for the review. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20230916081615.4237-1-iuncuim@gmail.com Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
iuncuim
Linus Walleij
parent
0ec8ae4313
commit
44da5bf49b
1 changed files with 366 additions and 14 deletions
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@ -15,33 +15,81 @@
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#include "pinctrl-sunxi.h"
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static const struct sunxi_desc_pin h616_pins[] = {
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/* Internal connection to the AC200 part */
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/* Internally connected to the AC200 part in the H616 SoC */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
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SUNXI_FUNCTION(0x2, "emac1")), /* ERXD1 */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* ERXD1 */
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SUNXI_FUNCTION(0x4, "i2c0"), /* SCK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PA_EINT0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
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SUNXI_FUNCTION(0x2, "emac1")), /* ERXD0 */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* ERXD0 */
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SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PA_EINT1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
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SUNXI_FUNCTION(0x2, "emac1")), /* ECRS_DV */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* ECRS_DV */
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SUNXI_FUNCTION(0x4, "i2c1"), /* SCK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PA_EINT2 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
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SUNXI_FUNCTION(0x2, "emac1")), /* ERXERR */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* ERXERR */
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SUNXI_FUNCTION(0x4, "i2c1"), /* SDA */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PA_EINT3 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
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SUNXI_FUNCTION(0x2, "emac1")), /* ETXD1 */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* ETXD1 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PA_EINT4 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
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SUNXI_FUNCTION(0x2, "emac1")), /* ETXD0 */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* ETXD0 */
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SUNXI_FUNCTION(0x3, "i2s0"), /* DOUT0 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PA_EINT5 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
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SUNXI_FUNCTION(0x2, "emac1")), /* ETXCK */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* ETXCK */
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SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PA_EINT6 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
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SUNXI_FUNCTION(0x2, "emac1")), /* ETXEN */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* ETXEN */
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SUNXI_FUNCTION(0x3, "i2s0"), /* BCLK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PA_EINT7 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
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SUNXI_FUNCTION(0x2, "emac1")), /* EMDC */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* EMDC */
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SUNXI_FUNCTION(0x3, "i2s0"), /* LRCK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PA_EINT8 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
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SUNXI_FUNCTION(0x2, "emac1")), /* EMDIO */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "emac1"), /* EMDIO */
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SUNXI_FUNCTION(0x3, "i2s0"), /* DIN0 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PA_EINT9 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
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SUNXI_FUNCTION(0x2, "i2c3")), /* SCK */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PA_EINT10 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
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SUNXI_FUNCTION(0x2, "i2c3")), /* SDA */
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PA_EINT11 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
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SUNXI_FUNCTION(0x2, "pwm5")),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "pwm5"),
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PA_EINT12 */
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/* Hole */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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@ -148,6 +196,310 @@ static const struct sunxi_desc_pin h616_pins[] = {
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SUNXI_FUNCTION(0x4, "spi0"), /* HOLD */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 16)), /* PC_EINT16 */
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/* Hole */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VP0 */
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SUNXI_FUNCTION(0x4, "ts0"), /* CLK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), /* PD_EINT0 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VN0 */
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SUNXI_FUNCTION(0x4, "ts0"), /* ERR */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PD_EINT1 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VP1 */
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SUNXI_FUNCTION(0x4, "ts0"), /* SYNC */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), /* PD_EINT2 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VN1 */
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SUNXI_FUNCTION(0x4, "ts0"), /* DVLD */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), /* PD_EINT3 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VP2 */
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SUNXI_FUNCTION(0x4, "ts0"), /* D0 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* PD_EINT4 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VN2 */
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SUNXI_FUNCTION(0x4, "ts0"), /* D1 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), /* PD_EINT5 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VPC */
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SUNXI_FUNCTION(0x4, "ts0"), /* D2 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), /* PD_EINT6 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VNC */
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SUNXI_FUNCTION(0x4, "ts0"), /* D3 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), /* PD_EINT7 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VP3 */
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SUNXI_FUNCTION(0x4, "ts0"), /* D4 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), /* PD_EINT8 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
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SUNXI_FUNCTION(0x3, "lvds0"), /* VN3 */
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SUNXI_FUNCTION(0x4, "ts0"), /* D5 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), /* PD_EINT9 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VP0 */
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SUNXI_FUNCTION(0x4, "ts0"), /* D6 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* PD_EINT10 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VN0 */
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SUNXI_FUNCTION(0x4, "ts0"), /* D7 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PD_EINT11 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VP1 */
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SUNXI_FUNCTION(0x4, "sim"), /* VPPEN */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)), /* PD_EINT12 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VN1 */
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SUNXI_FUNCTION(0x4, "sim"), /* VPPPP */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)), /* PD_EINT13 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VP2 */
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SUNXI_FUNCTION(0x4, "sim"), /* PWREN */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)), /* PD_EINT14 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VN2 */
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SUNXI_FUNCTION(0x4, "sim"), /* CLK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)), /* PD_EINT15 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VPC */
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SUNXI_FUNCTION(0x4, "sim"), /* DATA */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)), /* PD_EINT16 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VNC */
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SUNXI_FUNCTION(0x4, "sim"), /* RST */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)), /* PD_EINT17 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VP3 */
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SUNXI_FUNCTION(0x4, "sim"), /* DET */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)), /* PD_EINT18 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
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SUNXI_FUNCTION(0x3, "lvds1"), /* VN3 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)), /* PD_EINT19 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 20)), /* PD_EINT20 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 21)), /* PD_EINT21 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 22)), /* PD_EINT22 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 23)), /* PD_EINT23 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 24)), /* PD_EINT24 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 25)), /* PD_EINT25 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 26)), /* PD_EINT26 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
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SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 27)), /* PD_EINT27 */
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SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 28),
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SUNXI_FUNCTION(0x0, "gpio_in"),
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SUNXI_FUNCTION(0x1, "gpio_out"),
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SUNXI_FUNCTION(0x2, "pwm0"),
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 28)), /* PD_EINT28 */
|
||||
/* Hole */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* PCLK */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 0)), /* PE_EINT0 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 1)), /* PE_EINT1 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 2)), /* PE_EINT2 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 3)), /* PE_EINT3 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D0 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 4)), /* PE_EINT4 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D1 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 5)), /* PE_EINT5 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D2 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 6)), /* PE_EINT6 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D3 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 7)), /* PE_EINT7 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D4 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 8)), /* PE_EINT8 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D5 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 9)), /* PE_EINT9 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D6 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 10)), /* PE_EINT10 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D7 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 11)), /* PE_EINT11 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D8 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 12)), /* PE_EINT12 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D9 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 13)), /* PE_EINT13 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D10 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 14)), /* PE_EINT14 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D11 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 15)), /* PE_EINT15 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D12 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 16)), /* PE_EINT16 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D13 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 17)), /* PE_EINT17 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D14 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 18)), /* PE_EINT18 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* D15 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 19)), /* PE_EINT19 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* SCK */
|
||||
SUNXI_FUNCTION(0x5, "i2c2"), /* SCK */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 20)), /* PE_EINT20 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* SDA */
|
||||
SUNXI_FUNCTION(0x5, "i2c2"), /* SDA */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 21)), /* PE_EINT21 */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
SUNXI_FUNCTION(0x2, "csi"), /* FSIN0 */
|
||||
SUNXI_FUNCTION(0x4, "tcon0"), /* TRIG0 */
|
||||
SUNXI_FUNCTION_IRQ_BANK(0x6, 3, 22)), /* PE_EINT22 */
|
||||
/* Hole */
|
||||
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
|
||||
SUNXI_FUNCTION(0x0, "gpio_in"),
|
||||
SUNXI_FUNCTION(0x1, "gpio_out"),
|
||||
|
|
|
|||
Loading…
Reference in a new issue