mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-12 19:46:29 +00:00
pinctrl: sh-pfc: Updates for v5.1 (take two)
- Add DRIF (digital radio) pin groups on R-Car E3 and M3-N, - Add TMU (timer) pin groups on R-Car M3-N, - Miscellaneous fixes, - Build-time validation for fixed-size field width mismatches. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXGKcVgAKCRCKwlD9ZEnx cC1lAP9Ip+XE83narL4x47gV4WJOaW/cCw6obBiy1JPIoiWsqAEAqKpyAeEXbbPb urP7u2m0+siENSiA8v0SjzONaIsMBgk= =IaS5 -----END PGP SIGNATURE----- Merge tag 'sh-pfc-for-v5.1-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v5.1 (take two) - Add DRIF (digital radio) pin groups on R-Car E3 and M3-N, - Add TMU (timer) pin groups on R-Car M3-N, - Miscellaneous fixes, - Build-time validation for fixed-size field width mismatches.
This commit is contained in:
Linus Walleij
commit
44df22e7ce
7 changed files with 677 additions and 5 deletions
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@ -1260,6 +1260,14 @@ static const char * const dtv_groups[] = {
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"dtv_b",
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};
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static const char * const err_rst_reqb_groups[] = {
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"err_rst_reqb",
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};
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static const char * const ext_clki_groups[] = {
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"ext_clki",
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};
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static const char * const iic0_groups[] = {
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"iic0",
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};
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@ -1282,6 +1290,10 @@ static const char * const lcd_groups[] = {
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"yuv3",
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};
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static const char * const lowpwr_groups[] = {
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"lowpwr",
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};
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static const char * const ntsc_groups[] = {
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"ntsc_clk",
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"ntsc_data",
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@ -1295,6 +1307,10 @@ static const char * const pwm1_groups[] = {
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"pwm1",
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};
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static const char * const ref_clko_groups[] = {
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"ref_clko",
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};
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static const char * const sd_groups[] = {
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"sd_cki",
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};
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@ -1388,13 +1404,17 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(cam),
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SH_PFC_FUNCTION(cf),
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SH_PFC_FUNCTION(dtv),
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SH_PFC_FUNCTION(err_rst_reqb),
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SH_PFC_FUNCTION(ext_clki),
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SH_PFC_FUNCTION(iic0),
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SH_PFC_FUNCTION(iic1),
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SH_PFC_FUNCTION(jtag),
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SH_PFC_FUNCTION(lcd),
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SH_PFC_FUNCTION(lowpwr),
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SH_PFC_FUNCTION(ntsc),
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SH_PFC_FUNCTION(pwm0),
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SH_PFC_FUNCTION(pwm1),
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SH_PFC_FUNCTION(ref_clko),
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SH_PFC_FUNCTION(sd),
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SH_PFC_FUNCTION(sdi0),
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SH_PFC_FUNCTION(sdi1),
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@ -5236,7 +5236,7 @@ static const char * const scifb2_groups[] = {
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"scifb2_data_b",
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"scifb2_clk_b",
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"scifb2_ctrl_b",
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"scifb0_data_c",
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"scifb2_data_c",
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"scifb2_clk_c",
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"scifb2_data_d",
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};
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@ -1913,6 +1913,7 @@ static const char * const vin1_groups[] = {
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"vin1_data8",
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"vin1_data24_b",
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"vin1_data20_b",
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"vin1_data18_b",
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"vin1_data16_b",
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"vin1_sync",
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"vin1_field",
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@ -1850,6 +1850,280 @@ static const unsigned int canfd1_data_mux[] = {
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CANFD1_TX_MARK, CANFD1_RX_MARK,
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};
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/* - DRIF0 --------------------------------------------------------------- */
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static const unsigned int drif0_ctrl_a_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
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};
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static const unsigned int drif0_ctrl_a_mux[] = {
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RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
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};
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static const unsigned int drif0_data0_a_pins[] = {
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/* D0 */
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RCAR_GP_PIN(6, 10),
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};
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static const unsigned int drif0_data0_a_mux[] = {
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RIF0_D0_A_MARK,
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};
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static const unsigned int drif0_data1_a_pins[] = {
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/* D1 */
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RCAR_GP_PIN(6, 7),
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};
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static const unsigned int drif0_data1_a_mux[] = {
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RIF0_D1_A_MARK,
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};
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static const unsigned int drif0_ctrl_b_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4),
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};
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static const unsigned int drif0_ctrl_b_mux[] = {
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RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
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};
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static const unsigned int drif0_data0_b_pins[] = {
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/* D0 */
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RCAR_GP_PIN(5, 1),
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};
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static const unsigned int drif0_data0_b_mux[] = {
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RIF0_D0_B_MARK,
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};
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static const unsigned int drif0_data1_b_pins[] = {
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/* D1 */
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RCAR_GP_PIN(5, 2),
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};
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static const unsigned int drif0_data1_b_mux[] = {
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RIF0_D1_B_MARK,
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};
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static const unsigned int drif0_ctrl_c_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15),
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};
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static const unsigned int drif0_ctrl_c_mux[] = {
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RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK,
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};
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static const unsigned int drif0_data0_c_pins[] = {
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/* D0 */
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RCAR_GP_PIN(5, 13),
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};
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static const unsigned int drif0_data0_c_mux[] = {
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RIF0_D0_C_MARK,
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};
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static const unsigned int drif0_data1_c_pins[] = {
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/* D1 */
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RCAR_GP_PIN(5, 14),
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};
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static const unsigned int drif0_data1_c_mux[] = {
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RIF0_D1_C_MARK,
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};
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/* - DRIF1 --------------------------------------------------------------- */
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static const unsigned int drif1_ctrl_a_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
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};
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static const unsigned int drif1_ctrl_a_mux[] = {
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RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK,
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};
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static const unsigned int drif1_data0_a_pins[] = {
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/* D0 */
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RCAR_GP_PIN(6, 19),
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};
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static const unsigned int drif1_data0_a_mux[] = {
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RIF1_D0_A_MARK,
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};
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static const unsigned int drif1_data1_a_pins[] = {
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/* D1 */
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RCAR_GP_PIN(6, 20),
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};
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static const unsigned int drif1_data1_a_mux[] = {
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RIF1_D1_A_MARK,
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};
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static const unsigned int drif1_ctrl_b_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3),
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};
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static const unsigned int drif1_ctrl_b_mux[] = {
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RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK,
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};
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static const unsigned int drif1_data0_b_pins[] = {
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/* D0 */
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RCAR_GP_PIN(5, 7),
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};
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static const unsigned int drif1_data0_b_mux[] = {
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RIF1_D0_B_MARK,
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};
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static const unsigned int drif1_data1_b_pins[] = {
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/* D1 */
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RCAR_GP_PIN(5, 8),
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};
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static const unsigned int drif1_data1_b_mux[] = {
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RIF1_D1_B_MARK,
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};
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static const unsigned int drif1_ctrl_c_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11),
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};
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static const unsigned int drif1_ctrl_c_mux[] = {
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RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK,
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};
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static const unsigned int drif1_data0_c_pins[] = {
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/* D0 */
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RCAR_GP_PIN(5, 6),
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};
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static const unsigned int drif1_data0_c_mux[] = {
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RIF1_D0_C_MARK,
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};
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static const unsigned int drif1_data1_c_pins[] = {
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/* D1 */
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RCAR_GP_PIN(5, 10),
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};
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static const unsigned int drif1_data1_c_mux[] = {
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RIF1_D1_C_MARK,
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};
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/* - DRIF2 --------------------------------------------------------------- */
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static const unsigned int drif2_ctrl_a_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
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};
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static const unsigned int drif2_ctrl_a_mux[] = {
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RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
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};
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static const unsigned int drif2_data0_a_pins[] = {
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/* D0 */
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RCAR_GP_PIN(6, 7),
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};
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static const unsigned int drif2_data0_a_mux[] = {
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RIF2_D0_A_MARK,
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};
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static const unsigned int drif2_data1_a_pins[] = {
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/* D1 */
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RCAR_GP_PIN(6, 10),
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};
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static const unsigned int drif2_data1_a_mux[] = {
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RIF2_D1_A_MARK,
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};
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static const unsigned int drif2_ctrl_b_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27),
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};
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static const unsigned int drif2_ctrl_b_mux[] = {
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RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
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};
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static const unsigned int drif2_data0_b_pins[] = {
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/* D0 */
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RCAR_GP_PIN(6, 30),
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};
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static const unsigned int drif2_data0_b_mux[] = {
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RIF2_D0_B_MARK,
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};
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static const unsigned int drif2_data1_b_pins[] = {
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/* D1 */
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RCAR_GP_PIN(6, 31),
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};
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static const unsigned int drif2_data1_b_mux[] = {
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RIF2_D1_B_MARK,
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};
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/* - DRIF3 --------------------------------------------------------------- */
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static const unsigned int drif3_ctrl_a_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18),
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};
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static const unsigned int drif3_ctrl_a_mux[] = {
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RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
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};
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static const unsigned int drif3_data0_a_pins[] = {
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/* D0 */
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RCAR_GP_PIN(6, 19),
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};
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static const unsigned int drif3_data0_a_mux[] = {
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RIF3_D0_A_MARK,
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};
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static const unsigned int drif3_data1_a_pins[] = {
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/* D1 */
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RCAR_GP_PIN(6, 20),
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};
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static const unsigned int drif3_data1_a_mux[] = {
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RIF3_D1_A_MARK,
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};
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static const unsigned int drif3_ctrl_b_pins[] = {
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/* CLK, SYNC */
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RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
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};
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static const unsigned int drif3_ctrl_b_mux[] = {
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RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
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};
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static const unsigned int drif3_data0_b_pins[] = {
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/* D0 */
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RCAR_GP_PIN(6, 28),
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};
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static const unsigned int drif3_data0_b_mux[] = {
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RIF3_D0_B_MARK,
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};
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static const unsigned int drif3_data1_b_pins[] = {
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/* D1 */
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RCAR_GP_PIN(6, 29),
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};
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static const unsigned int drif3_data1_b_mux[] = {
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RIF3_D1_B_MARK,
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};
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/* - DU --------------------------------------------------------------------- */
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static const unsigned int du_rgb666_pins[] = {
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/* R[7:2], G[7:2], B[7:2] */
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@ -3760,6 +4034,42 @@ static const unsigned int ssi9_ctrl_b_mux[] = {
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SSI_SCK9_B_MARK, SSI_WS9_B_MARK,
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};
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/* - TMU -------------------------------------------------------------------- */
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static const unsigned int tmu_tclk1_a_pins[] = {
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/* TCLK */
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RCAR_GP_PIN(6, 23),
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};
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static const unsigned int tmu_tclk1_a_mux[] = {
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TCLK1_A_MARK,
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};
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static const unsigned int tmu_tclk1_b_pins[] = {
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/* TCLK */
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RCAR_GP_PIN(5, 19),
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};
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static const unsigned int tmu_tclk1_b_mux[] = {
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TCLK1_B_MARK,
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};
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static const unsigned int tmu_tclk2_a_pins[] = {
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/* TCLK */
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RCAR_GP_PIN(6, 19),
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};
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static const unsigned int tmu_tclk2_a_mux[] = {
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TCLK2_A_MARK,
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};
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static const unsigned int tmu_tclk2_b_pins[] = {
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/* TCLK */
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RCAR_GP_PIN(6, 28),
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};
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static const unsigned int tmu_tclk2_b_mux[] = {
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TCLK2_B_MARK,
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};
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/* - USB0 ------------------------------------------------------------------- */
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static const unsigned int usb0_pins[] = {
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@ -4037,6 +4347,36 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(canfd0_data_a),
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SH_PFC_PIN_GROUP(canfd0_data_b),
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SH_PFC_PIN_GROUP(canfd1_data),
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SH_PFC_PIN_GROUP(drif0_ctrl_a),
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SH_PFC_PIN_GROUP(drif0_data0_a),
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SH_PFC_PIN_GROUP(drif0_data1_a),
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SH_PFC_PIN_GROUP(drif0_ctrl_b),
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SH_PFC_PIN_GROUP(drif0_data0_b),
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SH_PFC_PIN_GROUP(drif0_data1_b),
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SH_PFC_PIN_GROUP(drif0_ctrl_c),
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SH_PFC_PIN_GROUP(drif0_data0_c),
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SH_PFC_PIN_GROUP(drif0_data1_c),
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SH_PFC_PIN_GROUP(drif1_ctrl_a),
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SH_PFC_PIN_GROUP(drif1_data0_a),
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SH_PFC_PIN_GROUP(drif1_data1_a),
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SH_PFC_PIN_GROUP(drif1_ctrl_b),
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SH_PFC_PIN_GROUP(drif1_data0_b),
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SH_PFC_PIN_GROUP(drif1_data1_b),
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SH_PFC_PIN_GROUP(drif1_ctrl_c),
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SH_PFC_PIN_GROUP(drif1_data0_c),
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SH_PFC_PIN_GROUP(drif1_data1_c),
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SH_PFC_PIN_GROUP(drif2_ctrl_a),
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SH_PFC_PIN_GROUP(drif2_data0_a),
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SH_PFC_PIN_GROUP(drif2_data1_a),
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SH_PFC_PIN_GROUP(drif2_ctrl_b),
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SH_PFC_PIN_GROUP(drif2_data0_b),
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SH_PFC_PIN_GROUP(drif2_data1_b),
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SH_PFC_PIN_GROUP(drif3_ctrl_a),
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SH_PFC_PIN_GROUP(drif3_data0_a),
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SH_PFC_PIN_GROUP(drif3_data1_a),
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SH_PFC_PIN_GROUP(drif3_ctrl_b),
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SH_PFC_PIN_GROUP(drif3_data0_b),
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SH_PFC_PIN_GROUP(drif3_data1_b),
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SH_PFC_PIN_GROUP(du_rgb666),
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SH_PFC_PIN_GROUP(du_rgb888),
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SH_PFC_PIN_GROUP(du_clk_out_0),
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|
|
@ -4280,6 +4620,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
|
|||
SH_PFC_PIN_GROUP(ssi9_data_b),
|
||||
SH_PFC_PIN_GROUP(ssi9_ctrl_a),
|
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SH_PFC_PIN_GROUP(ssi9_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(tmu_tclk1_a),
|
||||
SH_PFC_PIN_GROUP(tmu_tclk1_b),
|
||||
SH_PFC_PIN_GROUP(tmu_tclk2_a),
|
||||
SH_PFC_PIN_GROUP(tmu_tclk2_b),
|
||||
SH_PFC_PIN_GROUP(usb0),
|
||||
SH_PFC_PIN_GROUP(usb1),
|
||||
SH_PFC_PIN_GROUP(usb30),
|
||||
|
|
@ -4367,6 +4711,48 @@ static const char * const canfd1_groups[] = {
|
|||
"canfd1_data",
|
||||
};
|
||||
|
||||
static const char * const drif0_groups[] = {
|
||||
"drif0_ctrl_a",
|
||||
"drif0_data0_a",
|
||||
"drif0_data1_a",
|
||||
"drif0_ctrl_b",
|
||||
"drif0_data0_b",
|
||||
"drif0_data1_b",
|
||||
"drif0_ctrl_c",
|
||||
"drif0_data0_c",
|
||||
"drif0_data1_c",
|
||||
};
|
||||
|
||||
static const char * const drif1_groups[] = {
|
||||
"drif1_ctrl_a",
|
||||
"drif1_data0_a",
|
||||
"drif1_data1_a",
|
||||
"drif1_ctrl_b",
|
||||
"drif1_data0_b",
|
||||
"drif1_data1_b",
|
||||
"drif1_ctrl_c",
|
||||
"drif1_data0_c",
|
||||
"drif1_data1_c",
|
||||
};
|
||||
|
||||
static const char * const drif2_groups[] = {
|
||||
"drif2_ctrl_a",
|
||||
"drif2_data0_a",
|
||||
"drif2_data1_a",
|
||||
"drif2_ctrl_b",
|
||||
"drif2_data0_b",
|
||||
"drif2_data1_b",
|
||||
};
|
||||
|
||||
static const char * const drif3_groups[] = {
|
||||
"drif3_ctrl_a",
|
||||
"drif3_data0_a",
|
||||
"drif3_data1_a",
|
||||
"drif3_ctrl_b",
|
||||
"drif3_data0_b",
|
||||
"drif3_data1_b",
|
||||
};
|
||||
|
||||
static const char * const du_groups[] = {
|
||||
"du_rgb666",
|
||||
"du_rgb888",
|
||||
|
|
@ -4711,6 +5097,13 @@ static const char * const ssi_groups[] = {
|
|||
"ssi9_ctrl_b",
|
||||
};
|
||||
|
||||
static const char * const tmu_groups[] = {
|
||||
"tmu_tclk1_a",
|
||||
"tmu_tclk1_b",
|
||||
"tmu_tclk2_a",
|
||||
"tmu_tclk2_b",
|
||||
};
|
||||
|
||||
static const char * const usb0_groups[] = {
|
||||
"usb0",
|
||||
};
|
||||
|
|
@ -4763,6 +5156,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
|
|||
SH_PFC_FUNCTION(can_clk),
|
||||
SH_PFC_FUNCTION(canfd0),
|
||||
SH_PFC_FUNCTION(canfd1),
|
||||
SH_PFC_FUNCTION(drif0),
|
||||
SH_PFC_FUNCTION(drif1),
|
||||
SH_PFC_FUNCTION(drif2),
|
||||
SH_PFC_FUNCTION(drif3),
|
||||
SH_PFC_FUNCTION(du),
|
||||
SH_PFC_FUNCTION(hscif0),
|
||||
SH_PFC_FUNCTION(hscif1),
|
||||
|
|
@ -4797,6 +5194,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
|
|||
SH_PFC_FUNCTION(sdhi2),
|
||||
SH_PFC_FUNCTION(sdhi3),
|
||||
SH_PFC_FUNCTION(ssi),
|
||||
SH_PFC_FUNCTION(tmu),
|
||||
SH_PFC_FUNCTION(usb0),
|
||||
SH_PFC_FUNCTION(usb1),
|
||||
SH_PFC_FUNCTION(usb30),
|
||||
|
|
|
|||
|
|
@ -1599,6 +1599,199 @@ static const unsigned int canfd1_data_mux[] = {
|
|||
CANFD1_TX_MARK, CANFD1_RX_MARK,
|
||||
};
|
||||
|
||||
/* - DRIF0 --------------------------------------------------------------- */
|
||||
static const unsigned int drif0_ctrl_a_pins[] = {
|
||||
/* CLK, SYNC */
|
||||
RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 19),
|
||||
};
|
||||
|
||||
static const unsigned int drif0_ctrl_a_mux[] = {
|
||||
RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif0_data0_a_pins[] = {
|
||||
/* D0 */
|
||||
RCAR_GP_PIN(5, 17),
|
||||
};
|
||||
|
||||
static const unsigned int drif0_data0_a_mux[] = {
|
||||
RIF0_D0_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif0_data1_a_pins[] = {
|
||||
/* D1 */
|
||||
RCAR_GP_PIN(5, 18),
|
||||
};
|
||||
|
||||
static const unsigned int drif0_data1_a_mux[] = {
|
||||
RIF0_D1_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif0_ctrl_b_pins[] = {
|
||||
/* CLK, SYNC */
|
||||
RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 15),
|
||||
};
|
||||
|
||||
static const unsigned int drif0_ctrl_b_mux[] = {
|
||||
RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif0_data0_b_pins[] = {
|
||||
/* D0 */
|
||||
RCAR_GP_PIN(3, 13),
|
||||
};
|
||||
|
||||
static const unsigned int drif0_data0_b_mux[] = {
|
||||
RIF0_D0_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif0_data1_b_pins[] = {
|
||||
/* D1 */
|
||||
RCAR_GP_PIN(3, 14),
|
||||
};
|
||||
|
||||
static const unsigned int drif0_data1_b_mux[] = {
|
||||
RIF0_D1_B_MARK,
|
||||
};
|
||||
|
||||
/* - DRIF1 --------------------------------------------------------------- */
|
||||
static const unsigned int drif1_ctrl_pins[] = {
|
||||
/* CLK, SYNC */
|
||||
RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 1),
|
||||
};
|
||||
|
||||
static const unsigned int drif1_ctrl_mux[] = {
|
||||
RIF1_CLK_MARK, RIF1_SYNC_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif1_data0_pins[] = {
|
||||
/* D0 */
|
||||
RCAR_GP_PIN(5, 2),
|
||||
};
|
||||
|
||||
static const unsigned int drif1_data0_mux[] = {
|
||||
RIF1_D0_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif1_data1_pins[] = {
|
||||
/* D1 */
|
||||
RCAR_GP_PIN(5, 3),
|
||||
};
|
||||
|
||||
static const unsigned int drif1_data1_mux[] = {
|
||||
RIF1_D1_MARK,
|
||||
};
|
||||
|
||||
/* - DRIF2 --------------------------------------------------------------- */
|
||||
static const unsigned int drif2_ctrl_a_pins[] = {
|
||||
/* CLK, SYNC */
|
||||
RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
|
||||
};
|
||||
|
||||
static const unsigned int drif2_ctrl_a_mux[] = {
|
||||
RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif2_data0_a_pins[] = {
|
||||
/* D0 */
|
||||
RCAR_GP_PIN(2, 8),
|
||||
};
|
||||
|
||||
static const unsigned int drif2_data0_a_mux[] = {
|
||||
RIF2_D0_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif2_data1_a_pins[] = {
|
||||
/* D1 */
|
||||
RCAR_GP_PIN(2, 9),
|
||||
};
|
||||
|
||||
static const unsigned int drif2_data1_a_mux[] = {
|
||||
RIF2_D1_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif2_ctrl_b_pins[] = {
|
||||
/* CLK, SYNC */
|
||||
RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5),
|
||||
};
|
||||
|
||||
static const unsigned int drif2_ctrl_b_mux[] = {
|
||||
RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif2_data0_b_pins[] = {
|
||||
/* D0 */
|
||||
RCAR_GP_PIN(1, 6),
|
||||
};
|
||||
|
||||
static const unsigned int drif2_data0_b_mux[] = {
|
||||
RIF2_D0_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif2_data1_b_pins[] = {
|
||||
/* D1 */
|
||||
RCAR_GP_PIN(1, 7),
|
||||
};
|
||||
|
||||
static const unsigned int drif2_data1_b_mux[] = {
|
||||
RIF2_D1_B_MARK,
|
||||
};
|
||||
|
||||
/* - DRIF3 --------------------------------------------------------------- */
|
||||
static const unsigned int drif3_ctrl_a_pins[] = {
|
||||
/* CLK, SYNC */
|
||||
RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11),
|
||||
};
|
||||
|
||||
static const unsigned int drif3_ctrl_a_mux[] = {
|
||||
RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif3_data0_a_pins[] = {
|
||||
/* D0 */
|
||||
RCAR_GP_PIN(2, 12),
|
||||
};
|
||||
|
||||
static const unsigned int drif3_data0_a_mux[] = {
|
||||
RIF3_D0_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif3_data1_a_pins[] = {
|
||||
/* D1 */
|
||||
RCAR_GP_PIN(2, 13),
|
||||
};
|
||||
|
||||
static const unsigned int drif3_data1_a_mux[] = {
|
||||
RIF3_D1_A_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif3_ctrl_b_pins[] = {
|
||||
/* CLK, SYNC */
|
||||
RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9),
|
||||
};
|
||||
|
||||
static const unsigned int drif3_ctrl_b_mux[] = {
|
||||
RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif3_data0_b_pins[] = {
|
||||
/* D0 */
|
||||
RCAR_GP_PIN(0, 10),
|
||||
};
|
||||
|
||||
static const unsigned int drif3_data0_b_mux[] = {
|
||||
RIF3_D0_B_MARK,
|
||||
};
|
||||
|
||||
static const unsigned int drif3_data1_b_pins[] = {
|
||||
/* D1 */
|
||||
RCAR_GP_PIN(0, 11),
|
||||
};
|
||||
|
||||
static const unsigned int drif3_data1_b_mux[] = {
|
||||
RIF3_D1_B_MARK,
|
||||
};
|
||||
|
||||
/* - DU --------------------------------------------------------------------- */
|
||||
static const unsigned int du_rgb666_pins[] = {
|
||||
/* R[7:2], G[7:2], B[7:2] */
|
||||
|
|
@ -3574,7 +3767,7 @@ static const unsigned int vin5_clk_b_mux[] = {
|
|||
|
||||
static const struct {
|
||||
struct sh_pfc_pin_group common[245];
|
||||
struct sh_pfc_pin_group automotive[2];
|
||||
struct sh_pfc_pin_group automotive[23];
|
||||
} pinmux_groups = {
|
||||
.common = {
|
||||
SH_PFC_PIN_GROUP(audio_clk_a),
|
||||
|
|
@ -3826,6 +4019,27 @@ static const struct {
|
|||
.automotive = {
|
||||
SH_PFC_PIN_GROUP(canfd0_data),
|
||||
SH_PFC_PIN_GROUP(canfd1_data),
|
||||
SH_PFC_PIN_GROUP(drif0_ctrl_a),
|
||||
SH_PFC_PIN_GROUP(drif0_data0_a),
|
||||
SH_PFC_PIN_GROUP(drif0_data1_a),
|
||||
SH_PFC_PIN_GROUP(drif0_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(drif0_data0_b),
|
||||
SH_PFC_PIN_GROUP(drif0_data1_b),
|
||||
SH_PFC_PIN_GROUP(drif1_ctrl),
|
||||
SH_PFC_PIN_GROUP(drif1_data0),
|
||||
SH_PFC_PIN_GROUP(drif1_data1),
|
||||
SH_PFC_PIN_GROUP(drif2_ctrl_a),
|
||||
SH_PFC_PIN_GROUP(drif2_data0_a),
|
||||
SH_PFC_PIN_GROUP(drif2_data1_a),
|
||||
SH_PFC_PIN_GROUP(drif2_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(drif2_data0_b),
|
||||
SH_PFC_PIN_GROUP(drif2_data1_b),
|
||||
SH_PFC_PIN_GROUP(drif3_ctrl_a),
|
||||
SH_PFC_PIN_GROUP(drif3_data0_a),
|
||||
SH_PFC_PIN_GROUP(drif3_data1_a),
|
||||
SH_PFC_PIN_GROUP(drif3_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(drif3_data0_b),
|
||||
SH_PFC_PIN_GROUP(drif3_data1_b),
|
||||
}
|
||||
};
|
||||
|
||||
|
|
@ -3880,6 +4094,39 @@ static const char * const canfd1_groups[] = {
|
|||
"canfd1_data",
|
||||
};
|
||||
|
||||
static const char * const drif0_groups[] = {
|
||||
"drif0_ctrl_a",
|
||||
"drif0_data0_a",
|
||||
"drif0_data1_a",
|
||||
"drif0_ctrl_b",
|
||||
"drif0_data0_b",
|
||||
"drif0_data1_b",
|
||||
};
|
||||
|
||||
static const char * const drif1_groups[] = {
|
||||
"drif1_ctrl",
|
||||
"drif1_data0",
|
||||
"drif1_data1",
|
||||
};
|
||||
|
||||
static const char * const drif2_groups[] = {
|
||||
"drif2_ctrl_a",
|
||||
"drif2_data0_a",
|
||||
"drif2_data1_a",
|
||||
"drif2_ctrl_b",
|
||||
"drif2_data0_b",
|
||||
"drif2_data1_b",
|
||||
};
|
||||
|
||||
static const char * const drif3_groups[] = {
|
||||
"drif3_ctrl_a",
|
||||
"drif3_data0_a",
|
||||
"drif3_data1_a",
|
||||
"drif3_ctrl_b",
|
||||
"drif3_data0_b",
|
||||
"drif3_data1_b",
|
||||
};
|
||||
|
||||
static const char * const du_groups[] = {
|
||||
"du_rgb666",
|
||||
"du_rgb888",
|
||||
|
|
@ -4219,7 +4466,7 @@ static const char * const vin5_groups[] = {
|
|||
|
||||
static const struct {
|
||||
struct sh_pfc_function common[45];
|
||||
struct sh_pfc_function automotive[2];
|
||||
struct sh_pfc_function automotive[6];
|
||||
} pinmux_functions = {
|
||||
.common = {
|
||||
SH_PFC_FUNCTION(audio_clk),
|
||||
|
|
@ -4271,6 +4518,10 @@ static const struct {
|
|||
.automotive = {
|
||||
SH_PFC_FUNCTION(canfd0),
|
||||
SH_PFC_FUNCTION(canfd1),
|
||||
SH_PFC_FUNCTION(drif0),
|
||||
SH_PFC_FUNCTION(drif1),
|
||||
SH_PFC_FUNCTION(drif2),
|
||||
SH_PFC_FUNCTION(drif3),
|
||||
}
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -3354,7 +3354,8 @@ static const char * const fsic_groups[] = {
|
|||
"fsic_sclk_out",
|
||||
"fsic_data_in",
|
||||
"fsic_data_out",
|
||||
"fsic_spdif",
|
||||
"fsic_spdif_0",
|
||||
"fsic_spdif_1",
|
||||
};
|
||||
|
||||
static const char * const fsid_groups[] = {
|
||||
|
|
|
|||
|
|
@ -126,7 +126,8 @@ struct pinmux_cfg_reg {
|
|||
* one for each possible combination of the register field bit values.
|
||||
*/
|
||||
#define PINMUX_CFG_REG(name, r, r_width, f_width) \
|
||||
.reg = r, .reg_width = r_width, .field_width = f_width, \
|
||||
.reg = r, .reg_width = r_width, \
|
||||
.field_width = f_width + BUILD_BUG_ON_ZERO(r_width % f_width), \
|
||||
.enum_ids = (const u16 [(r_width / f_width) * (1 << f_width)])
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in a new issue