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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-28 21:33:52 +00:00
ARM: dts: omap3: Fix NAND device nodes
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
6607fac8f4
commit
44e4716499
17 changed files with 75 additions and 17 deletions
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@ -93,7 +93,8 @@ &charger {
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};
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&gpmc {
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ranges = <1 0 0x08000000 0x1000000>; /* CS1: 16MB for LAN9221 */
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ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
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1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */
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ethernet@gpmc {
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pinctrl-names = "default";
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@ -35,11 +35,15 @@ wl12xx_vmmc: wl12xx_vmmc {
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};
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&gpmc {
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ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
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ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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linux,mtd-name = "micron,mt29f4g16abbda3w";
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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linux,mtd-name = "micron,mt29f4g16abbda3w";
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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gpmc,sync-clk-ps = <0>;
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@ -384,8 +384,11 @@ &gpmc {
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/* Chip select 0 */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* NAND I/O window, 4 bytes */
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interrupts = <20>;
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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ti,nand-ecc-opt = "ham1";
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nand-bus-width = <16>;
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#address-cells = <1>;
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@ -261,10 +261,14 @@ &mcbsp2 {
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};
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&gpmc {
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ranges = <0 0 0x00000000 0x01000000>;
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ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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nand-bus-width = <8>;
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gpmc,device-width = <1>;
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ti,nand-ecc-opt = "sw";
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@ -204,7 +204,11 @@ &gpmc {
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ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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nand-bus-width = <16>;
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gpmc,device-width = <2>;
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ti,nand-ecc-opt = "sw";
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@ -154,12 +154,16 @@ &uart3 {
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};
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&gpmc {
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ranges = <0 0 0x00000000 0x1000000>, /* CS0: 16MB for NAND */
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ranges = <0 0 0x30000000 0x1000000>, /* CS0: 16MB for NAND */
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<5 0 0x2c000000 0x01000000>;
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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linux,mtd-name= "hynix,h8kds0un0mer-4em";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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nand-bus-width = <16>;
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gpmc,device-width = <2>;
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ti,nand-ecc-opt = "bch8";
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@ -492,7 +492,11 @@ &gpmc {
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ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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@ -95,8 +95,12 @@ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
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&gpmc {
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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linux,mtd-name= "micron,mt29c4g96maz";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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nand-bus-width = <16>;
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gpmc,device-width = <2>;
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ti,nand-ecc-opt = "bch8";
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@ -210,8 +210,8 @@ eeprom@50 {
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};
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&gpmc {
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ranges = <0 0 0x00000000 0x20000000>,
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<5 0 0x2c000000 0x01000000>;
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ranges = <0 0 0x30000000 0x01000000>, /* CS0: 16MB for NAND */
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<5 0 0x2c000000 0x01000000>; /* CS5: 16MB for ethernet */
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ethernet@gpmc {
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pinctrl-names = "default";
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@ -58,3 +58,7 @@ &uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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&gpmc {
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ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
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};
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@ -97,12 +97,16 @@ key_down {
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};
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&gpmc {
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ranges = <0 0 0x00000000 0x01000000>,
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<1 0 0x08000000 0x01000000>;
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ranges = <0 0 0x30000000 0x1000000>, /* CS0 space, 16MB */
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<1 0 0x08000000 0x1000000>; /* CS1 space, 16MB */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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linux,mtd-name= "micron,nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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nand-bus-width = <16>;
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gpmc,device-width = <2>;
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ti,nand-ecc-opt = "bch8";
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@ -362,7 +362,11 @@ &gpmc {
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<7 0 0x15000000 0x01000000>;
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nand@0,0 {
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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/* no elm on omap3 */
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@ -226,8 +226,12 @@ &gpmc {
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ranges = <0 0 0x00000000 0x20000000>;
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nand@0,0 {
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compatible = "ti,omap2-nand";
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linux,mtd-name= "micron,mt29c4g96maz";
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reg = <0 0 0>;
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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nand-bus-width = <16>;
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gpmc,device-width = <2>;
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ti,nand-ecc-opt = "bch8";
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@ -546,7 +546,11 @@ &gpmc {
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ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "sw";
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@ -275,10 +275,14 @@ &mcbsp3 {
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};
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&gpmc {
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ranges = <0 0 0x00000000 0x01000000>;
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ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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nand-bus-width = <16>;
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gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
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ti,nand-ecc-opt = "sw";
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@ -723,6 +723,8 @@ gpmc: gpmc@6e000000 {
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gpmc,num-waitpins = <4>;
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#address-cells = <2>;
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#size-cells = <1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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usb_otg_hs: usb_otg_hs@480ab000 {
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@ -103,10 +103,14 @@ partition@280000 {
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};
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nand@1,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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linux,mtd-name= "micron,mt29f1g08abb";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
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ti,nand-ecc-opt = "sw";
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nand-bus-width = <8>;
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gpmc,cs-on-ns = <0>;
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